Manual

MAX5556–MAX5559
Low-Cost Stereo Audio DACs
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TIME
OUTPUT
VOLTAGE
(OUTR OR OUTL)
V
OUT_
RAMPS UP
TO QUIESCENT
VOLTAGE AT 5V/s (TYP)
V
OUT_
BEGINS TO
FOLLOW THE DATA. THE
AMPLITUDE IS RAMPED
TO FULL SCALE (20ms TYP)
VALID MCLK/LRCLK RATIO
DETECTED
V
OUT_
SETTLES AT
QUIESCENT VOLTAGE (2.4V)
Figure 14. Power-Up Sequence
TIME
OUTPUT
VOLTAGE
(OUTR OR OUTL)
INVALID CLOCK
CONDITION
MUTE: V
OUT_
IMMEDIATELY
FORCED TO DC QUIESCENT
LEVEL (2.4V)
VALID MCLK/LRCLK
RE-ESTABLISHED AND MCLK
EQUAL OR GREATER THAN
MINIMUM OPERATING FREQUENCY
V
OUT_
SOFT START
RAMPING (20ms TYP)
Figure 15. Invalid Clock Output Response