Owner's manual

MAX5661
Single 16-Bit DAC with Current and Voltage
Outputs for Industrial Analog Output Modules
20 _______________________________________________________________________________________
CS
SCLK
DIN
C7 C6 C5 C4 D3 D2 D1 D0
DOUT
c7 c6 c5 c4 d3 d2 d1 d0
BITS WITH CAPITAL LETTERS REPRESENT DATA BEING WRITTEN TO THE SHIFT REGISTER.
BITS WITH LOWERCASE LETTERS REPRESENT DATA IN THE SHIFT REGISTER FROM THE PREVIOUS 24-BIT CYCLE.
p
p IS DATA LEFT FROM THE PREVIOUS INSTRUCTION CYCLE.
Figure 3. SPI-Interface Timing Diagram (CPOL = CPHA = 1)
CS
SCLK
DIN
C7 C6 C5 C4 D3 D2 D1 D0
DOUT
c7 c6 c5 c4 d3 d2 d1 d0 C7
BITS WITH CAPITAL LETTERS REPRESENT DATA BEING WRITTEN TO THE SHIFT REGISTER.
BITS WITH LOWERCASE LETTERS REPRESENT DATA IN THE SHIFT REGISTER FROM THE PREVIOUS 24-BIT CYCLE.
Figure 2. MICROWIRE- or SPI-Interface Timing Diagram (CPOL = CPHA = 0)