Owner's manual

MAX5661
Single 16-Bit DAC with Current and Voltage
Outputs for Industrial Analog Output Modules
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PARAMETER SYM B O L CONDITIONS MIN TYP MAX UNITS
SCLK Rise or Fall to CS Fall
Setup Time
t
CSO
45 ns
CS Fall to SCLK Rise or Fall
Setup Time
t
CSS
40 ns
SCLK Pulse-Width High t
CH
45 ns
SCLK Pulse-Width Low t
CL
45 ns
DIN to SCLK High Setup Time t
DS
40 ns
DIN to SCLK High Hold Time t
DH
0ns
SCLK Period t
CP
100 ns
CS Pulse-Width High t
CSW
100 ns
CS High to SCLK High or Low
Setup Time
t
CS1
45 ns
SCLK High to CS Hold Time t
CSH
45 ns
SCLK Fall to DOUT Valid
Propagation Delay
t
DO
C
DOUT
= 100pF 100 ns
CS Transitions to DOUT
Enable/Disable Delay
t
DV
C
DOUT
= 100pF 100 ns
SCLK Fall or Rise to CS Rise
Time
t
SCS
15 ns
LDAC Pulse-Width Low t
LDL
40 ns
CS Rise to LDAC Rise Time t
CSLD
80 ns
Note 1: Devices are 100% production tested at T
A
= +25°C and +105°C. Operation to -40°C is guaranteed by design.
Note 2: I
OUT
INL 100% production tested from 0 to 20mA only.
Note 3: I
OUT
DNL guaranteed by V
OUT
DNL.
Note 4: 0 to 20mA zero-scale current extrapolated by interpolation from full scale and code 192. See the
Measuring Zero-Code
Current (0 to 20mA Mode)
section.
Note 5: OUTI voltage compliance measured at V
DDI
= +33.22V.
Note 6: When updating the DAC registers, allow 5µs before sending the next command.
TIMING CHARACTERISTICS
(V
CC
= +5V, C
COMPI
= 22nF, V
DDV
= V
DDCORE
= +15V, V
SSV
= -15V, V
DDI
= +24V, V
REF
= +4.096V, AGND = DGND = DUTGND =
DACGND = 0V, R
SERIES
= 47, OUTV loaded with 2k || 100pF to AGND, OUTI loaded with 500 to AGND, T
A
= -40°C to +105°C,
unless otherwise noted. Typical values are at T
A
= +25°C. See Figure 1.) (Notes 1, 6)