Manual

MAX5886
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
_______________________________________________________________________________________ 9
ended output voltages. The differential voltage existing
between IOUTP and IOUTN can also be converted to a
single-ended voltage using a transformer or a differen-
tial amplifier configuration. If no transformer is used, the
output should have a 50 termination to the analog
ground and a 50 resistor between the outputs.
Although not recommended because of additional
noise pickup from the ground plane, for single-ended
operation IOUTP should be selected as the output, with
IOUTN connected to AGND. Note that a single-ended
output configuration has a higher 2nd-order harmonic
distortion at high output frequencies than a differential
output configuration.
1.2V
REFERENCE
CURRENT-STEERING
DAC
FUNCTION
SELECTION
BLOCK
AGND
SEL0DGND
DV
DD
REFIO
FSADJ
CLKN
CLKP
PD
AV
DD
IOUTP
IOUTN
SEGMENT SHUFFLING/LATCH
DECODER
LVDS RECEIVER/INPUT LATCH
12
DIFFERENTIAL DIGITAL INPUTS B0 THROUGH B11
MAX5886
Figure 1. Simplified MAX5886 Block Diagram
R
SET
(k)
FULL-SCALE CURRENT
I
OUT
(mA)
REFERENCE CURRENT
I
REF
(µA)
CALCULATED 1% EIA STD
OUTPUT VOLTAGE
V
IOUTP/N
* (mV
P-P
)
2 62.5 19.2 19.1 100
5 156.25 7.68 7.5 250
10 312.5 3.84 3.83 500
15 468.75 2.56 2.55 750
20 625 1.92 1.91 1000
Table 1. I
OUT
and R
SET
Selection Matrix Based on a Typical 1.200V Reference Voltage
*Terminated into a 50 load.