9-1044; Rev 0; 6/08 KIT ATION EVALU E L B A IL AVA Fully Programmable Serializer/Deserializer with UART/I2C Control Channel The MAX9257 serializer pairs with the MAX9258 deserializer to form a complete digital video serial link. The MAX9257/MAX9258 feature programmable parallel data width, parallel clock frequency range, spread spectrum, and preemphasis. An integrated control channel transfers data bidirectionally at power-up during video blanking over the same differential pair used for video data.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel ABSOLUTE MAXIMUM RATINGS VCC_ to GND .........................................................-0.5V to +4.0V Any Ground to Any Ground...................................-0.5V to +0.5V SDI+, SDI-, SDO+, SDO- to GND..........................-0.5V to +4.0V SDO+, SDO- Short Circuit to GND or VCCLVDS .........Continuous DIN[0:15], GPIO[0:9], PCLK_IN, HSYNC_IN, VSYNC_IN, SCL/TX, SDA/RX, REM to GND ............-0.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel (VCC_ = +3.0V to +3.6V, RL = 50Ω ±1%, TA = -40°C to +105°C, unless otherwise noted. Typical values are at VCC_ = +3.3V, TA = +25°C.) (Notes 2, 3) PARAMETER SYMBOL Low-Level Output Voltage VOL Output Short-Circuit Current IOS CONDITIONS MIN TYP MAX IOL = 100µA 0.1 IOL = 2mA 0.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257 DC ELECTRICAL CHARACTERISTICS (continued) (VCC_ = +3.0V to +3.6V, RL = 50Ω ±1%, TA = -40°C to +105°C, unless otherwise noted. Typical values are at VCC_ = +3.3V, TA = +25°C.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel (VCC_ = +3.0V to +3.6V, RL = 50Ω ±1%, TA = -40°C to +105°C, unless otherwise noted. Typical values are at VCC_ = +3.3V, TA = +25°C.) (Notes 5, 9) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 200.00 ns 70 MHz PCLK_IN TIMING REQUIREMENTS Clock Period tT 14.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257 AC ELECTRICAL CHARACTERISTICS (continued) (VCC_ = +3.0V to +3.6V, RL = 50Ω ±1%, TA = -40°C to +105°C, unless otherwise noted. Typical values are at VCC_ = +3.3V, TA = +25°C.) (Notes 5, 9) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Low Period of SCL Clock tLOW (Figure 30) 1.1 µs High Period of SCL Clock tHIGH (Figure 30) 0.6 µs Repeated START Condition Setup Time tSU:STA (Figure 30) 0.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel (VCC_ = +3.0V to +3.6V, RL = 50Ω ±1%, differential input voltage |VID| = 0.05V to 1.2V, input common-mode voltage VCM = |VID/2| to VCC - |VID/2|, TA = -40°C to +105°C, unless otherwise noted. Typical values are at VCC_ = +3.3V, |VID| = 0.2V, VCM = 1.2V, TA = +25°C.
MAX9258 AC ELECTRICAL CHARACTERISTICS (continued) VCC_ = +3.0V to +3.6V, RL = 50Ω ±1%, CL = 8pF, differential input voltage |VID| = 0.1V to 1.2V, input common-mode voltage VCM = |VID/2| to VCC - |VID/2|, TA = -40°C to +105°C, unless otherwise noted. Typical values are at VCC_ = +3.3V, |VID| = 0.2V, VCM = 1.2V, TA = +25°C. (Notes 5, 6, and 7) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Data Valid Before PCLK_ OUT tDVB (Figure 11) 0.35 x tT ns Data Valid After PCLK_OUT tDVA (Figure 11) 0.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel 4% SPREAD MAX9257/58 toc05 PRBS PATTERN 10-BIT 100 SUPPLY CURRENT (mA) MAX9257/58 toc04 120 MAX9257/58 toc06 SERIAL LINK SWITCHING PATTERN WITH SERIAL LINK SWITCHING PATTERN WITHOUT PREEMPHASIS (BIT RATE = 840MHz, 2m STP CABLE) PREEMPHASIS (BIT RATE = 840MHz, 2m STP CABLE) (PREEMPHASIS = 100%) MAX9258 SUPPLY CURRENT vs.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257/MAX9258 MAX9257 Pin Description PIN FUNCTION LQFP 1, 18 2, 21 VCCIO 2, 11, 19, 34 3, 14, 22, 41 GND 3–8 4–9 DIN[9:14]/ GPIO[1:6] Data Input/General Purpose Input/Output. When a serial-data word is less than 18 bits word length, DIN_ not programmed as data inputs becomes GPIO (Table 22). DIN[9:14] are internally pulled down to ground. 9 10 GNDFPLL Filter PLL Ground 10 11 VCCFPLL Filter PLL Supply Voltage.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel PIN TQFN LQFP 29 34 NAME REM 30, 31, 32, 35, 38, 35–39 39, 42–46 DIN[0:7] 40 47 DIN8/GPIO0 — 1, 12, 13 24, 25, 36, 37, 48 N.C. — — EP FUNCTION Remote Power-Up/Power-Down Select Input. Connect REM to ground for power-up to follow VCC. Connect REM high to VCC through 10kΩ resistor for remote power-up. REM is internally pulled down to GND. Data Inputs. DIN[0:7] are internally pulled down to ground.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9258 Pin Description (continued) PIN NAME 16 TX 17 LOCK FUNCTION LVCMOS/LVTTL Control Channel UART Input. TX is internally pulled up to VCCOUT. Open-Drain Lock Output. LOCK asserts high to indicate PLLs are locked with correct serial-word boundary alignment. LOCK asserts low to indicate PLLs are not locked or incorrect serial-word boundary alignment was detected. Pull up to VCCOUT with a 1kΩ resistor.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257/MAX9258 RL/2 SDO+ VOD SDO- VOS RL/2 GND ((SDO+) + (SDO-))/2 SDOVOS(-) VOS(+) VOS(-) SDO+ ΔVOS = |VOS(+) - VOS(-)| VOD(+) VOD = 0V VOD(-) ΔVOD = |VOD(+) - VOD(-)| VOD(-) (SDO+) - (SDO-) Figure 1. MAX9257 LVDS DC Output Parameters VOUT PCLK_IN DIN VHYST- -VID VHYST+ VID = 0V Figure 2. Input Hysteresis NOTE: PCLK_IN PROGRAMMED FOR RISING LATCH EDGE. +VID Figure 3.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel SDO+ RL SDOCL CL 80% 80% 20% 20% (SDO+) - (SDO-) tFALL tRISE Figure 4. MAX9257 LVDS Control Channel Output Load and Output Rise/Fall Times VIHMIN PCLK_IN VILMAX tSET tHOLD VIHMIN VIHMIN VILMAX VILMAX DIN, VSYNC_IN, HSYNC_IN NOTE: PCLK_IN PROGRAMMED FOR RISING LATCHING EDGE. Figure 5.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257/MAX9258 EXPANDED TIME SCALE DIN, HSYNC_IN, VSYNC_IN N N+1 N+3 N+2 N+4 PCLK_IN N N-1 SDO tPSD1 FIRST BIT LAST BIT Figure 6. MAX9257 Parallel-to-Serial Delay tT VIHMIN tHIGH PCLK_IN VILMAX tF tR tLOW Figure 7. MAX9257 Parallel Input Clock Requirements PCLK_OUT CL MAX9258 SINGLE-ENDED OUTPUT LOAD DOUT 0.9 x VCCOUT NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCH EDGE. Figure 8.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel tT VOHMIN tHIGH PCLK_OUT VOLMAX tLOW Figure 10. MAX9258 Clock Output High and Low Time VOHMIN PCLK_OUT VOLMAX tDVB tDVA VOHMIN DOUT, VSYNC_OUT, HSYNC_OUT, LOCK VOLMAX NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCHING EDGE. Figure 11. MAX9258 Output Data Valid Times PD VIHMIN PD VILMAX tPUD tPDD DOUT, VSYNC, HSYNC POWERED DOWN Figure 12.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257/MAX9258 SERIAL-WORD LENGTH SERIAL WORD N SERIAL WORD N+1 SERIAL WORD N+2 SDI LAST BIT FIRST BIT DOUT, HSYNC_OUT, VSYNC_OUT PARALLEL WORD N-1 PARALLEL WORD N-2 PARALLEL WORD N PCLK_OUT tSPD1 NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCHING EDGE. Figure 14. MAX9258 Serial-to-Parallel Delay INPUT TEMPLATE FOR LVDS SERIAL VSDI+ - VSDI+100mV +25mV -25mV 0V -100mV tJT 0.0UI tS 0.25UI tJT tS 0.50UI 0.75UI 1.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel ECU CAMERA VIDEO DATA MAX9257 MAX9258 PIXEL CLOCK VIDEO DATA PIXEL CLOCK HSYNC_OUT VSYNC_OUT DESERIALIZER SERIALIZER 100Ω PD 100Ω HSYNC_IN VSYNC_IN GPIO CCEN ERROR LOCK RX UART TX SDA UART UARTTO-I2C SCL MAX9257 VIDEO DATA I2C Figure 17.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel 8tT VSYNC_IN SDI/O± the control channel is open. Programmable timers and ECU signal activity determine how long the control channel stays open. The timers are reset by ECU signal activity. ECU programming must not exceed the vertical blanking time to avoid loss of video data.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Table 1.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257/MAX9258 Table 1.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Table 2.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel BIT 1 2 3 NAME EN0 EN1 4 HSYNC VSYNC 5 6 7 8 9 10 11 12 13 14 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 15 16 17 18 19 20 D10 D11 D12 D13 D14 D15 Table 6. Serial Video Data Format for 18-Bit Serial-Word Length (Parallel-Word Width = 16) BIT 1 2 NAME EN0 EN1 3 4 HSYNC VSYNC 5 6 7 8 9 10 11 12 13 14 15 16 17 18 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 Table 7.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Pixel Clock Frequency Range The MAX9257/MAX9258 each have registers that can be configured at startup. Depending on the word length, the MAX9257 multiplies PCLK_IN (pixel clock) by 12, 14, 16, 18, or 20 using an internal PLL to generate the serial clock. Use Table 20 for proper selection of available PCLK frequency and serial-data ranges.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel 1/fSSM PRATE (REG1[7:6]) SPREAD (%) 00 Off 01 ±2 10 Off 11 ±4 fSPREAD (MAX) fPCLK_IN TIME fSPREAD (MIN) Figure 21. Simplified Modulation Profile for the MAX9257/MAX9258 tracks and passes the spread to the data and clock outputs. The PRATE range of 00 and 01 (5MHz ≤ PCLK ≤ 20MHz) supports all the spread options. The PRATE range of 10 and 11 (20MHz ≤ PCLK ≤ 70MHz) requires that the spread be 2% or less. Table 18.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Table 20. MAX9257 Modulation Rate SERIAL-WORD LENGTH 12 14 16 18 20 SRATE PRATE PCLK RANGE (MHz) MODULATION RATE fSSM RANGE (kHz) 11 11 40–70 PCLK/2728 14.7 to 25.7 11 10 33.3–40 PCLK/1736 19.2 to 23.0 10 10 20–33.3 PCLK/1612 12.4 to 20.7 10 01 16.6–20 PCLK/992 16.7 to 20.2 01 01 10–16.6 PCLK/1116 9.0 to 14.9 01 00 8.3–10 PCLK/744 11.2 to 13.4 00 00 5–8.3 PCLK/868 5.8 to 9.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel REG12[7:5] PREEMPHASIS (%) 000,101,110 001 010 011 100 111 20 40 60 80 100 0 Table 23. Selection of Base Mode or Bypass Mode INTEN MAX9257 REG8[6], MAX9258 REG7[6] 0 INTMODE MAX9257 REG8[7], MAX9258 REG7[7] X Table 22. GPIOs vs.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel VSYNC_IN T1 SDI/O± T3 T2 HSK VIDEO VIDEO CCEN TX RX FROZEN DOUT_ T1 = TIME TO ENTER CONTROL CHANNEL T2 = STO TIMEOUT PERIOD T3 = CONTROL CHANNEL EXIT TIME DUE TO STO HSK = HANDSHAKING BETWEEN THE MAX9257 AND THE MAX9258 Figure 22. Control Channel Closing Due to STO Timeout register REG2 for both the MAX9257 and the MAX9258.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257/MAX9258 VSYNC_IN T1 SDI/O± VIDEO T5 ECU ACTIVITY HSK VIDEO T4 (BASE MODE) CCEN T4 (BYPASS MODE) TX RX DOUT_ FROZEN T1 = TIME TO ENTER CONTROL CHANNEL T4 = ETO TIMEOUT PERIOD T5 = CONTROL CHANNEL EXIT TIME DUE TO ETO HSK = HANDSHAKING BETWEEN MAX9257 AND MAX9258 Figure 23. Control Channel Closing Due to ETO Timeout counter bits REG3[3:0] that increment once every ETO clock period.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel After the control channel closes, there is a brief handshake period (T3 in Figure 22 and T5 in Figure 23) between the MAX9257 and the MAX9258. The MAX9258 sends a special lock frame to the MAX9257 to indicate if PLL is still locked. The MAX9258 sends the lock frame if the number of decoding errors didn’t exceed a threshold in the last LVDS video phase session.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Link Power-Up The MAX9258 powers up when the power-down input PD goes high. After approximately 130µs, CCEN goes high, indicating the control channel is available. This delay is required because the analog circuitry has to fully wake up. There are two ways to power up the MAX9257. The MAX9257 powers up according to the state of REM. ECU powers up MAX9257 remotely (ECU sends command to power up) when REM is pulled to VCC.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel case, ERROR deasserts high after next video phase starts if video parity errors were the only reason that ERROR was asserted low. To report parity errors in bypass mode, program autoerror reset (AER) to 1 (REG1[5] = 1). Autoerror Reset The default method to reset errors is to read the respective error registers in the MAX9258 (registers 10, 11, and 13).
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Overview of Control Channel Operation The control channel is used by the ECU to program registers in the MAX9257, MAX9258, and peripheral devices (such as a camera) during vertical blanking, after power-up, or when serialization is disabled. Control channel communication is half-duplex UART. The peripheral interface on the MAX9257 can be programmed to be I2C or UART.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel VSYNC_IN T1 SDI/O ± VIDEO T2 ECU ACTIVITY T5 HSK T1 VIDEO T2 T5 VIDEO HSK VIDEO T4 CCEN T3 TX RX FROZEN DOUT_ FROZEN T3 CONTROL CHANNEL BYPASS MODE T1 = TIME TO ENTER CONTROL CHANNEL T2 = STO TIMER T3 = CTO TIMER T4 = ETO TIMER T5 = CONTROL CHANNEL EXIT TIME HSK = HANDSHAKING BETWEEN THE MAX9257 & THE MAX9258 = TIMER RESET BYPASS MODE BASE MODE STO > CTO > ETO Figure 24.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel LSB MAX9258 MSB LSB I2C SLAVE ADDRESS + Wr MAX9257/MAX9258 UART ECU MSB REG ADDR LSB MSB DATA 0 DATA N I2C PERIPHERAL MAX9257 S A W SLAVE ADDRESS REG ADDRESS DATA 0 A MSB LSB MSB DATA N A MSB LSB A P LSB Figure 25. UART-to-I2C Conversion D1 D0 START D3 D2 D4 D5 D6 D7 PARITY STOP NUMBER OF BYTES BYTE 1 Figure 26.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Read Packet The ECU writes the sync frame, 7-bit device address plus read/write bit (R/W = 1 for read), 8-bit register address, and number of bytes to be read. The addressed device responds with read data bytes (Figure 29). UART read delay is maximum 4 bit times when reading from the MAX9257 or the MAX9258.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel I2C. The SCL and SDA timings are based on the UART bit clock. The I2C data rate is determined by UART and can range from 95kbps to 4.25Mbps. The I2C timing requirements scale linearly from fast mode to higher speeds. Table 31 shows the I2C timing information for data rates greater than 400kbps. The I2C parameters scale with tUCLK. See Figure 30 for timing parameters.
tLOW tF tR tHD;STA SCL tHD;STA tSU;STA tHD;DAT tHIGH tSU;STO tSU;DAT SDA tBUF P S S P Figure 30. I2C Timing Parameters performed with or without spread spectrum. If the PRBS test is programmed to run continuously, the MAX9257 must be powered down to stop the test. When programmed for a finite number of repetitions, the control channel is enabled after the PRBS test finishes and serialization enable (SEREN) is reset to 0. To start normal operation, the ECU must disable PRBSEN and enable SEREN.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel C=− 4 × tB × DSV ln(1 - D) × (RTR + RTD ) where: C = AC-coupling capacitor (F) tB = bit time(s) DSV = digital sum variation (integer) ln = natural log D = droop (% of signal amplitude) RTD = driver termination resistor (Ω) RTR = receiver termination resistor (Ω) The bit time (tB) is the serial-clock period or the period of the pixel clock divided by the total number of bits.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Choosing I2C Pullup Resistors I2C requires pullup resistors to provide a logic-high level to data and clock lines. There are tradeoffs between power dissipation and speed, and a compromise must be made in choosing pullup resistor values. Every device connected to the bus introduces some capacitance even when device is not in operation.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel ADDRESS BITS DEFAULT NAME DESCRIPTION Control channel end timeout: (ETO) times out if ECU does not use control channel for this amount of time after it has already used at least once.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257 Register Table (continued) ADDRESS BITS DEFAULT NAME 7 0 INTMODE 6 0 INTEN Interface enable 0 = disabled (default), 1 = enabled 5 0 FAST Fast UART transceiver 0 = bit rate = DC to 4.25Mbps (default), 1 = bit rate = 4.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel ADDRESS 12 13 14 15 BITS DEFAULT 7:5 111 4:0 00000 7:2 000000 1:0 00 7:1 (RO) 0 (RO) 7:0 (RO) NAME PREEMP I2CFILT DESCRIPTION LVDS driver preemphasis setting 000 = 20% 111 = off (default) 001 = 40% 101 = 20% 010 = 60% 110 = 20% 011 = 80% 100 = 100% Reserved (set to 00000) Reserved (set to 000000) I2C glitch filter setting 00 = set according to programmed bit rate (default) 100ns at (95Kbps to 400Kbps) bit rate 50
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9258 Register Table ADDRESS BITS DEFAULT NAME 7:6 10 PRATE 5:4 11 SRATE 3 0 PAREN 0 2:0 101 PWIDTH 7:6 00 SPREAD 5 0 AER 4:0 00000 1 DESCRIPTION Pixel clock frequency range 00 = 5MHz to 10MHz 01 = 10MHz to 20MHz 10 = 20MHz to 40MHz (default) 11 = 40MHz to 70MHz Serial-data rate range 00 = 60Mbps to 100Mbps 01 = 100Mbps to 200Mbps 10 = 200Mbps to 400Mbps 11 = 400Mbps to 840Mbps (default) Par
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel ADDRESS BITS DEFAULT NAME DESCRIPTION Control channel end timeout: (ETO) times out if ECU does not use control channel for this amount of time after it has already used at least once.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9258 Register Table (continued) ADDRESS BITS DEFAULT NAME 8 7:0 00010000 PATHRLO Threshold for number of video parity errors (8 LSBs) If the number of errors exceeds this value, ERR pin is asserted. 9 7:0 00000000 PATHRHI Threshold for number of video parity errors (8 MSBs) If the number of errors exceeds this value, ERR pin is asserted.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Human Body Model and Machine Model ESD tolerances. The Human Body Model discharge components are CS = 100pF and RD = 1.5kΩ (Figure 33). The IEC 61000-4-2 discharge components are CS = 150pF and RD = 330Ω (Figure 32). The ISO 10605 discharge components are CS = 330pF and RD = 2kΩ (Figure 34). The Machine Model discharge components are CS = 200pF and RD = 0Ω (Figure 35).
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257/MAX9258 Functional Diagram BYPASS MAX9257 SERIALIZER FILTER PLL PARALLEL INPUTS CLK IN DIN[0:15] HSYNC_IN ±1.5% TO ±4% SPREAD PLL N x PCLK_IN PCLK_IN 1x CLK OUT ENCODE/ DC BALANCE + FIFO LVDS Tx PARALLEL TO SERIAL SDODIN WIDTH VSYNC_IN 1.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel 40 39 38 37 36 35 34 33 32 31 7 24 GNDSPLL DIN14/GPIO6 8 23 VCCSPLL GNDFPLL 9 22 GPIO9 25 GNDLVDS VCCFPLL N.C. 37 DIN2 DIN1 N.C. 38 39 40 41 42 DIN5 DIN4 DIN3 GND VCC 43 45 46 44 30 29 9 28 10 27 11 26 12 25 13 N.C. GND DIN15/GPIO7 HSYNC_IN VCC GND VCCIO SDA/RX SCL/TX PCLK_IN VSYNC_IN HSYNC_IN DIN15/GPIO7 N.C.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel MAX9257/MAX9258 Typical Operating Circuit 10 UP TO 20m CABLE LENGTH DATA 10 PCLK ECU HSYNC SERIAL I/O 100Ω 100Ω SERIAL I/O VSYNC LOCK TX μC PCLK HSYNC VSYNC MAX9258 RX SERIALIZED DIGITAL VIDEO CONTROL CHANNEL CONTROL UNIT 50 DATA MAX9257 SCL SDA REMOTE CAMERA ASSEMBLY ______________________________________________________________________________________ CMOS IMAGE SENSOR
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel QFN THIN.EPS ______________________________________________________________________________________ 51 MAX9257/MAX9258 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.
Fully Programmable Serializer/Deserializer with UART/I2C Control Channel 32L/48L,LQFP.EPS PACKAGE OUTLINE, 32/48L LQFP, 7x7x1.4mm 21-0054 F 1 2 ______________________________________________________________________________________ 53 MAX9257/MAX9258 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.
MAX9257/MAX9258 Fully Programmable Serializer/Deserializer with UART/I2C Control Channel Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) PACKAGE OUTLINE, 32/48L LQFP, 7x7x1.4mm 21-0054 F 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.