9-5865; Rev 0; 6/11 EVALUATION KIT AVAILABLE MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology General Description Features The MAX98089 is a full-featured audio codec whose high performance and low power consumption make it ideal for portable applications. S S S S Class D speaker amplifiers provide efficient amplification for two speakers. Low radiated emissions enable completely filterless operation.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology TABLE OF CONTENTS General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . .
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology TABLE OF CONTENTS (continued) ADC Input Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Record Path Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Microphone AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology TABLE OF CONTENTS (continued) Jack Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Jack Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Accessory Button Detection . . . . . . . . . . . . . . . . . . . . . . . .
INABYP MBEN JDETEN JACK DETECTION REG + + EXTMIC EXTMIC PGAM1: +20dB TO 0dB PGAINB: +20dB TO -6dB INBDIFF PGAINB: +20dB TO -6dB PGAINA: +20dB TO -6dB INADIFF PGAINA: +20dB TO -6dB PA2EN: 0/20/30dB PGAM2: +20dB TO 0dB PA1EN: 0/20/30dB NOTE: BUMP NUMBERS SHOWN FOR WLP PACKAGE. SEE THE PIN DESCRIPTION SECTION FOR TQFN PINOUT.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ABSOLUTE MAXIMUM RATINGS (Voltages with respect to AGND.) DVDD, AVDD, PVDD, HPVDD...............................-0.3V to +2.2V SPKLVDD, SPKRVDD, DVDDS1, DVDDS2...........-0.3V to +6.0V DGND, HPGND, SPKLGND, SPKRGND...............-0.1V to +0.1V HPVSS................................ (HPGND - 2.2V) to (HPGND + 0.3V) C1N..................................... (HPVSS - 0.3V) to (HPGND + 0.3V) C1P......................................(HPGND - 0.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out loads (RLOUT) connected from LOUTL or LOUTR to SPKLGND. RLOAD = RHP = J, RREC = J, ZSPK = J, CREF = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology DIGITAL INPUT/OUTPUT CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SDINS1, BCLKS1, LRCLKS1—INPUT Input High Voltage VIH Input Low Voltage VIL 0.7 x DVDDS1 V 0.29 x DVDDS1 Input Hysteresis 200 Input Leakage Current IIH, IIL VDVDDS1 = 3.6V, VIN = 0V, 3.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology DIGITAL INPUT/OUTPUT CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGMICDATA—INPUT Input High Voltage VIH Input Low Voltage VIL 0.65 x DVDD V 0.35 x DVDD Input Hysteresis 125 Input Leakage Current IIH, IIL VDVDD = 2.0V, VIN = 0V, 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology AUDIO INTERFACE TIMING CHARACTERISTICS (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology tBCLK tF tR tBCLKH BCLK (OUTPUT) tBCLKL BCLK (INPUT) tCLKSYNC tSYNCSET tCLKSYNC LRCLK (OUTPUT) tSYNCHOLD LRCLK (INPUT) tCLKTX tHIZOUT SDOUT (OUTPUT) LSB SDOUT (OUTPUT) MSB HI-Z tCLKTX tHIZOUT LSB HI-Z MSB tSETUP tHOLD SDIN (INPUT) LSB tSETUP tHOLD SDIN (INPUT) MSB LSB MSB MASTER MODE SLAVE MODE Figure 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology 1/fMICCLK tHD,MIC tSU,MIC tHD,MIC tSU,MIC LEFT RIGHT LEFT RIGHT Figure 4. Digital Microphone Timing Diagram I2C TIMING CHARACTERISTICS (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology I2C TIMING CHARACTERISTICS (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.) (Note 1) SDA tLOW tBUF tSU,STA tSU,DAT tHD,STA tHD,DAT tSP tSU,STO tHIGH SCL tHD,STA tR tF START CONDITION REPEATED START CONDITION STOP CONDITION START CONDITION Figure 5. I2C Interface Timing Diagram Note 1: The IC is 100% production tested at TA = +25NC.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Power Consumption (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, MAS = 0.) IAVDD (mA) IPVDD (mA) ISPKVDD + ISPKLVDD (mA) IDVDD (mA) IDVDDS1 + IDVDDS2 (mA) POWER (mW) DYNAMIC RANGE (dB) DAC Playback 48kHz Stereo HP DAC ª HP 24-bit, music filters, 256Fs 2.04 1.27 0.00 1.53 0.01 8.72 101 DAC Playback 48kHz Stereo HP DAC ª HP 24-bit, music filters, 256Fs, 0.1mW/ channel, RHP = 32I 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Power Consumption (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, MAS = 0.) IAVDD (mA) IPVDD (mA) ISPKVDD + ISPKLVDD (mA) IDVDD (mA) IDVDDS1 + IDVDDS2 (mA) POWER (mW) DYNAMIC RANGE (dB) DAC Playback 48kHz Mono SPK DAC ª SPK 24-bit, music filters 1.35 0.00 3.23 1.84 0.01 17.69 92 Line Playback Mono SPK INA ª SPKL Differential inputs 1.01 0.00 3.24 0.03 0.00 13.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Typical Operating Characteristics (continued) (VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V. Speaker loads (ZSPK) connected between SPK_P and SPK_N. Receiver load (RREC) connected between RECP and RECN. Headphone loads (RHP) connected from HPL or HPR to HPGND. Line out (RLOUT) connected from LOUTL or LOUTR to SPKLGND, CREF = 2.2FF, CMICBIAS = CREG = 1FF, CC1N-C1P = 1FF, CHPVDD = CHPVSS = 1FF.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Pin Configuration TOP VIEW (BUMP SIDE DOWN) 1 2 3 4 5 6 7 8 9 A SPKRN SPKRGND SPKLVDD SPKLP SPKLN RECP/ LOUTL/ RXINP PVDD HPVSS HPGND B SPKRN SPKRGND SPKLVDD SPKLP SPKLN RECN/ LOUTR/ RXINN C1P C1N HPVDD C SPKRP SPKRP SPKRVDD SPKLGND SPKLGND N.C N.C. HPSNS HPL MAX98089 D BCLKS1 SDOUTS1 SPKRVDD LRCLKS1 N.C. N.C. N.C. INB2 HPR E DVDDS1 MCLK N.C.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology N.C. HPGND HPVSS HPVDD HPL HPSNS HPR INB2 INB1 INA2/EXTMICN INA1/EXTMICP MIC1P/DIGMICDATA MIC2P TOP VIEW MIC1N/DIGMICCLK Pin Configuration (continued) 42 41 40 39 38 37 36 35 34 33 32 31 30 29 MIC2N 43 28 N.C. MICBIAS 44 27 CIN JACKSNS 45 26 C1P 25 PVDD N.C.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Pin Description BUMP (WLP) PIN (TQFN-EP) A1, B1 15 SPKRN A2, B2 16 SPKRGND Right-Speaker Ground A3, B3 19 SPKLVDD Left-Speaker, REF, Receiver Amp Power Supply. Bypass to SPKLGND with a 1FF and a 10FF capacitor. A4, B4 20 SPKLP Positive Left-Channel Class D Speaker Output A5, B5 22 SPKLN Negative Left-Channel Class D Speaker Output A6 24 A7 25 A8 A9 B6 23 B7 26 C1P Charge-Pump Flying Capacitor Positive Terminal.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Pin Description (continued) BUMP (WLP) PIN (TQFN-EP) NAME E1 6 DVDDS1 E2 5 MCLK E4 9 SDINS1 FUNCTION S1 Digital Audio Interface Power-Supply Input. Bypass to DGND with a 1FF capacitor. Master Clock Input. Acceptable input frequency range is 10MHz to 60MHz. S1 Digital Audio Serial-Data DAC Input. The input/output voltage is referenced to DVDDS1. Hardware Interrupt Output.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Pin Description (continued) BUMP (WLP) PIN (TQFN-EP) NAME G1 1 SDOUTS2 G2 55 DVDDS2 S2 Digital Audio Interface Power-Supply Input. Bypass to DGND with a 1FF capacitor. G3 54 SDINS2 S2 Digital Audio Serial-Data DAC Input. The input voltage is referenced to DVDDS2. G4 53 DVDD Digital Power Supply. Supply for the digital core and I2C interface. Bypass to DGND with a 1FF capacitor. G5 50 AVDD Analog Power Supply.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Detailed Description The MAX98089 is a fully integrated stereo audio codec with FLEXSOUND technology and integrated amplifiers. Two differential microphone amplifiers can accept signals from three analog inputs. One input can be retasked to support two digital microphones. Any combination of two microphones (analog or digital) can be recorded simultaneously. The analog signals are amplified up to 50dB and recorded by the stereo ADC.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology I2C Slave Address Configure the MAX98089 using the I2C control bus. The IC uses a slave address of 0x20 or 00100000 for write operations and 0x21 or 00100001 for read operations. See the I2C Serial Interface section for a complete interface description. Registers Table 1 lists all of the registers, their addresses, and power-on-reset states. Registers 0x00 to 0x03 and 0xFF are read-only while all of the other registers are read/ write.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 1.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 1.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 1.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 1.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 1.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Power Management The IC includes comprehensive power management to allow the disabling of all unused circuits, minimizing supply current. Table 2. Power Management Registers REGISTER 0x51 BIT DESCRIPTION Global Shutdown. Disables everything except the headset detection circuitry, which is controlled separately. 0 = Device Shutdown 1 = Device Enabled 7 SHDN 6 VBATEN 3 PERFMODE Performance Mode.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 2. Power Management Registers (continued) REGISTER BIT NAME 7 HPLEN Left Headphone Enable 0 = Disabled 1 = Enabled 6 HPREN Right Headphone Enable 0 = Disabled 1 = Enabled 5 SPLEN Left Speaker Enable 0 = Disabled 1 = Enabled 4 SPREN Right Speaker Enable 0 = Disabled 1 = Enabled 0x4D DESCRIPTION 3 RECLEN Receiver/Left Line Output Enable. Use this bit to enable the differential receiver output or left line output.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Microphone Inputs The device includes three differential microphone inputs and a low-noise microphone bias for powering the microphones (Figure 6). One microphone input can also be configured as a digital microphone input accepting signals from up to two digital microphones. Any two microphones, analog or digital, can be recorded simultaneously.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 3. Microphone Input Registers REGISTER BIT NAME 6 PA1EN/PA2EN 5 MIC1/MIC2 PGA Fine microphone gain adjustment.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 3. Microphone Input Registers (continued) REGISTER BIT NAME 7 INABYP 4 MIC2BYP 1 RECBYP 0x4A DESCRIPTION INA_/EXTMIC_ to MIC1_ Bypass Switch 0 = Disabled 1 = Enabled MIC1_ to MIC2_ Bypass Switch 0 = Disabled 1 = Enabled See the Output Bypass Switches section. 0 SPKBYP Line Inputs The device includes two sets of line inputs (Figure 7). Each set can be configured as a stereo single-ended input or as a mono differential input.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 4. Line Input Registers REGISTER BIT 6 0x37/0x38 NAME DESCRIPTION INAEXT/INBEXT 2 1 PGAINA/PGAINB 0 7 INADIFF 6 INBDIFF 0x47 Line Input A/B External Gain Switches out the internal input resistor and selects a trimmed 20kI feedback resistor. Use an external input resistor to set the gain of the line input.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 5. ADC Input Mixer Register REGISTER BIT NAME DESCRIPTION 7 Left/Right ADC Input Mixer Selects which analog inputs are recorded by the left/right ADC.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 6. Record Path Signal Processing Registers REGISTER BIT NAME 7 6 NG 5 AGC Gain Reports the current AGC gain setting.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 6. Record Path Signal Processing Registers (continued) REGISTER BIT NAME 3 AGCATK 2 0x3F 1 AGCHLD 0 DESCRIPTION AGC Attack Time Defined as the time required to reduce gain by 63% of the total gain reduction (one time constant of the exponential response). Attack times are longer for low AGC threshold levels. See Figure 12 for details. 00 = 2ms 01 = 7.2ms 10 = 31ms 11 = 123ms AGC Hold Time The delay before the AGC release begins.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology ATTACK TIME HOLD TIME RELEASE TIME Figure 12. AGC Timing ADC Record Level Control The IC includes separate digital level control for the left and right ADC outputs (Figure 13).
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 7. ADC Record Level Control Register REGISTER BIT NAME DESCRIPTION Left/Right ADC Gain 00 = 0dB 01 = 6dB 10 = 12dB 11 = 18dB 5 AVLG/AVRG 4 Left/Right ADC Level 3 0x33/0x34 VALUE 2 AVL/AVR 1 0 GAIN (dB) GAIN (dB) 0x0 +3 0x8 -5 0x1 +2 0x9 -6 0x2 +1 0xA -7 0x3 0 0xB -8 0x4 -1 0xC -9 0x5 -2 0xD -10 0x6 -3 0xE -11 0x7 -4 0xF -12 the digital level control to 0dB whenever possible.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 8. Sidetone Register REGISTER BIT NAME 7 DSTS 6 Sidetone Level Adjusts the sidetone signal level. All levels are referenced to the ADC’s full-scale output. 4 3 0x2E 2 1 0 DESCRIPTION Sidetone Source Selects which ADC output is fed back as sidetone. When mixing the left and right ADC outputs, each is attenuated by 6dB to prevent full-scale signals from clipping.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology the playback path in the digital audio interface to allow the IC’s full complement of digital signal processing to be used. Loopback allows digital data input to either SDINS1 or SDINS2 to be routed from one interface to the other for output on SDOUTS2 or SDOUTS1.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 10. Digital Audio Interface Registers REGISTER BIT 7 6 5 NAME MAS1/MAS2 WCI1/WCI2 DAI1/DAI2 Word Clock Invert TDM1/TDM2 = 0: 0 = Left-channel data is transmitted while LRCLK is low. 1 = Right-channel data is transmitted while LRCLK is low. TDM1/TDM2 = 1: Always set WCI = 0. BCI1/BCI2 DAI1/DAI2 Bit Clock Invert BCI1/BCI2 must be set to 1 when TDM1/TDM2 = 1. 0 = SDIN is accepted on the rising edge of BCLK.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 10. Digital Audio Interface Registers (continued) REGISTER BIT NAME 7 OSR1 6 5 DAC_OSR1/ DAC_OSR2 DAC Oversample Clock (Select PCLK/2 for higher performance. Select PCLK/4 for lower power consumption.) 1 = DAC input clock = PCLK/2 0 = DAC input clock = PCLK/4 BSEL1/ BSEL2 DAI1/DAI2 BCLK Output Frequency When operating in master mode, BSEL1/BSEL2 set the frequency of BCLK. When operating in slave mode, BSEL1/BSEL2 have no effect.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 10. Digital Audio Interface Registers (continued) REGISTER BIT NAME DESCRIPTION 2 HIZOFF1/ HIZOFF2 Disable DA1/DAI2 Output High-Impedance Mode Normally SDOUT is set high impedance between data words. Set HIZOFF1/HIZOFF2 to force a level on SDOUT at all times. 0 = Disabled 1 = Enabled 1 SDOEN1/ SDOEN2 DAI1/DAI2 Record Path Output Enable DAI2 outputs data only if LBEN1 = 1.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology WCI_ = 0, BCI_ = 0, DLY_ = 0, TDM_ = 0, FSW_ = 0, WS_ = 0, HIZOFF_ = 1, SLOTL_ = 0, SLOTR_ = 0 LRCLK SDOUT RIGHT LEFT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 BCLK SDIN WCI_ = 1, BCI_ = 0, DLY_ = 0, TDM_ = 0, FSW_ = 0, WS_ = 0, HIZOFF_ = 1, SLOTL_ = 0, SLOTR_ = 0 L
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology WCI_ = 0, BCI_ = 1, DLY_ = 0, TDM_ = 1, FSW_ = 0, WS_ = 0, HIZOFF_ = 0, SLOTL_ = 0, SLOTR_ = 1 LRCLK SDOUT HI-Z L15 L14 L13 L12 L11 L10 L9 L8 L7 L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 L4 L3 L2 L1 L0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 HI-Z BCLK SDIN L6 L5 WCI_ = 0, BCI_ = 1, DLY_ = 0, TDM_ = 1, FSW_ = 1, WS_ = 0, HIZOFF_ = 0, SLOTL_ = 0,
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Clock Control The digital signal paths in the IC require a master clock (MCLK) between 10MHz and 60MHz to function. The MAX98089 requires an internal clock between 10MHz and 20MHz. A prescaler divides MCLK by 1, 2, or 4 to create the internal clock (PCLK). PCLK is used to clock all portions of the IC. The MAX98089 includes two digital audio signal paths, both capable of supporting any sample rate from 8kHz to 96kHz.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 11. Clock Control Registers (continued) REGISTER BIT NAME DESCRIPTION Exact Integer Mode Overrides PLL1 and NI1 and configures a specific PCLK to LRCLK ratio.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 11. Clock Control Registers (continued) REGISTER BIT NAME DAI_ DAC Low Power Select. These bits setup the clocks to be generated from fixed counters that bypass the PLL for DAC low power mode.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 12. Common NI1/NI2 Values LRCLK (kHz) PCLK (MHz) DHF1/2 = 0 DHF1/2 = 1 8 11.025 12 16 22.05 24 32 44.1 48 64 88.2 96 13A9 1B18 1D7E 2752 3631 3AFB 4EA5 6C61 75F7 4EA5 6C61 75F7 11 11E0 18A2 1ACF 23BF 3144 359F 477E 6287 6B3E 477E 6287 6B3E 11.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 13. Sample Rate Converter Register REGISTER BIT NAME DESCRIPTION 4 SRMIX_MODE 3 SRMIX_ENL 2 SRMIX_ENR 1 SRC_ENL 0 SRC_ENR Sample Rate Mix Mode. Sets mixing configuration applied to the sample rate converted channel(s). 0 = (DAI1 + DAI2) 1 = (DAI1 + DAI2)/2 Sample Rate Mix Enable. If enabled, mixes data on DAI1 and DAI2. If cleared, SCR data source is DAI2 only.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 14. Passband Filtering Registers REGISTER BIT NAME 7 MODE1 6 MODE1 AVFLT1 4 0x18 DHF1 2 1 0 See Table 15. 1 Select a nonzero value to enable the DC- blocking filter. DAI1 High Sample Rate Mode Selects the sample rate range. 0 = 8kHz P LRCLK P 48kHz 1 = 48kHz P LRCLK P 96kHz MODE1 DVFLT1 DVFLT1 0 See Table 15. 1 Select a nonzero value to enable the DCblocking filter.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 15.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Playback Path Signal Processing The IC playback signal path includes automatic level control (ALC) and a 5-band parametric equalizer (EQ) (Figure 20). The DAI1 and DAI2 playback paths include separate ALCs controlled by a single set of registers. Two completely separate parametric EQs are included for the DAI1 and DAI2 playback paths.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 16. Automatic Level Control Registers BIT 7 NAME ALCEN ALC and Excursion Limiter Release Time Sets the release time for both the ALC and Excursion Limiter. See the Excursion Limiter section for Excursion Limiter release times. ALC release time is defined as the time required to adjust the gain from 12dB to 0dB. 6 5 0x43 ALCRLS 4 3 0 VALUE 000 001 010 011 100 101 110 111 ALC RELEASE TIME (s) 8 4 2 1 0.5 0.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Use the attenuator at the EQ’s input to avoid clipping the signal. The attenuator can be programmed for fixed attenuation or dynamic attenuation based on signal level. If the dynamic EQ clip detection is enabled, the signal level from the EQ is fed back to the attenuator circuit to determine the amount of gain reduction necessary to avoid clipping. The MAX98089 EV kit software includes a graphical interface for generating the EQ coefficients.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Playback Level Control allows boost when MODE1 = 0 and attenuation in any mode. The DAI2 signal path allows attenuation only. The IC includes separate digital level control for the DAI1 and DAI2 playback audio paths.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology DAC Input Mixers The IC’s stereo DAC accepts input from two digital audio paths. The DAC mixer routes any audio path to the left and right DACs (Figure 24).
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Receiver Amplifier The IC includes a single differential receiver amplifier. The receiver amplifier is designed to drive a 32I earpiece speaker. In cases where a single transducer is used for the loudspeaker and receiver, use the SPKBYP switch to route the receiver amplifier output to the left speaker outputs. The receiver amplifier can also be configured as stereo singleended line outputs using the I2C interface.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Receiver Output Mixer The IC’s receiver amplifier accepts input from the stereo DAC, the line inputs (single-ended or differential), and the MIC inputs. Configure the mixer to mix any combination of the available sources. When more than one signal is selected, the mixed signal can be configured to attenuate 6dB, 9dB, or 12dB. Table 20.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Receiver Output Volume Table 21.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Speaker Amplifiers The IC integrates a stereo filterless Class D amplifier that offers much higher efficiency than Class AB without the typical disadvantages. The high efficiency of a Class D amplifier is due to the switching operation of the output stage transistors. In a Class D amplifier, the output transistors act as current steering switches and consume negligible additional power.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Speaker Output Mixers The IC’s speaker amplifiers accept input from the stereo DAC, the line inputs (single-ended ore differential), and the MIC inputs. Configure the mixer to mix any combination of the available sources. When more than one signal is selected, the mixer can be configured to attenuate the signal by 6dB, 9dB or 12dB. Table 22.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Speaker Output Volume Table 23.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The transfer function for the user-programmable biquad is: b + b1z -1 + b 2z -2 H(z) = 0 1 + a 1z -1 + a 2z -2 The MAX98089 EV kit software includes a graphic interface for generating the user-programmable biquad coefficients. Note: Only change the excursion limiter settings when the signal path is disabled to prevent undesired artifacts.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 24.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Power Limiter The IC’s power limiter tracks the continuous power delivered to the loudspeaker and briefly mutes the speaker amplifier output if the speaker is at risk of sustaining permanent damage. Loudspeakers are typically damaged when the voice coil overheats due to extended operation above the rated power.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 25. Power Limiter Registers (continued) REGISTER BIT NAME 7 6 PWRT2 5 4 0x45 2 PWRT1 0 VALUE TIME CONSTANT (min) VALUE TIME CONSTANT (min) 3.75 0x0 Disabled 0x8 0x1 0.50 0x9 5.00 0x2 0.67 0xA 6.66 0x3 0.89 0xB 8.88 0x4 1.19 0xC Reserved 0x5 1.58 0xD Reserved 0x6 2.11 0xE Reserved 0x7 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 26. Distortion Limiter Registers REGISTER BIT NAME 7 6 5 THDCLP 0x46 4 0 DESCRIPTION Distortion Limit Measured in % THD+N.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology VDD VDD/2 GND CONVENTIONAL AMPLIFIER BIASING SCHEME +VDD GND Class H Operation A Class H amplifier uses a Class AB output stage with power supplies that are modulated by the output signal. In the case of the ICs, two nominal power-supply differentials of 1.8V (+0.9V to -0.9V) and 3.6V (+1.8V to -1.8V) are available from the charge pump. Figure 29 shows the operation of the output-voltage-dependent power supply.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology DACL DALEN DACR DAREN MIXHPL_ PATH SEL MIX HPVOLL: +3dB TO -67dB HPL HPLEN MIXHPL HPSNS MIX MIXHPR MIXHPR_ PATH SEL HPVOLR: +3dB TO -67dB HPR HPREN Figure 31.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Headphone Output Mixers The headphone amplifier mixer accepts input from the stereo DAC, the line inputs (single-ended or differential), and the MIC inputs. Configure the mixer to mix any combination of the available sources. When more than one signal is selected, the mixer can be configured to attenuate the signal by 6dB, 9dB, or 12dB.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Headphone Output Volume Table 28.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Output Bypass Switches The IC’s includes two output bypass switches that solve common applications problems. When a single transducer is used for the loudspeaker and receiver, the need exists for two amplifiers to power the same transducer. Bypass switches connect the IC’s receiver amplifier output to the speaker amplifier’s output, allowing either amplifier to power the same transducer.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Click-and-Pop Reduction The IC includes extensive click-and-pop reduction circuitry. The circuitry minimizes clicks and pops at turn-on, turn-off, and during volume changes. Zero-crossing detection is implemented on all analog PGAs and volume controls to prevent large glitches when volume changes are made. Instead of making a volume change immediately, the change is made when the audio signal crosses the midpoint.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Jack Detection The IC features jack detection that can detect the insertion and removal of a jack as well as the load type. When a jack is detected, an interrupt on IRQ can be triggered (by setting IJDET). to alert the microcontroller of the event. Figure 33 shows the typical configuration for jack detection. Jack Insertion To detect a jack insertion, the IC must have a power supply.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 33. Change in JKSNS Upon Jack Removal JACK TYPE GND GND MIC JDWK = 1 AND MICBIAS DISABLED JDWK = 0 OR MICBIAS ENABLED HPR HPL JKSNS: 00 è 11 JKSNS: 00 è 11 HPR HPL JKSNS: 00 è 11 JKSNS: 01 è 11 Table 34. Jack Detection Registers REGISTER BIT NAME DESCRIPTION JACKSNS State Reports the status of JACKSNS when JDETEN = 1. VALUE 7 0x02 (Read Only) 00 JKSNS 6 10 0x4B JDETEN 1 JDEB 0 DESCRIPTION VJACKSNS < 0.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Table 34. Jack Detection Registers (continued) REGISTER BIT NAME 7 BGEN See the Power Management section. 6 SPREGEN See the Power Management section. 5 VCMEN See the Power Management section. 4 BIASEN See the Power Management section. 0x4E 0 JDWK DESCRIPTION JACKSNS Pullup When JDWK = 1, JACKSNS is slow to increase in voltage. Set JDWK = 0 before setting JDETEN = 1 to prevent false detection. Valid when MBIAS = 0. 0 = 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Device Status The IC uses register 0x00 and IRQ to report the status of various device functions. The status register bits are set when their respective events occur, and cleared upon reading the register. Device status can be determined either by poling register 0x00 or configuring the IRQ to pull low when specific events occur. IRQ is an open-drain output that requires a pullup resistor for proper operation.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Device Revision Table 37. Device Revision Register REGISTER 0xFF (Read Only) BIT 7 6 5 4 3 2 1 0 NAME DESCRIPTION Device Revision Code REV is always set to 0x40. REV I2C Serial Interface The IC features an I2C/SMBusK-compatible, 2-wire serial interface comprising a serial-data line (SDA) and a serial-clock line (SCL). SDA and SCL facilitate communication between the IC and the master at clock rates up to 400kHz.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Slave Address The slave address is defined as the seven most significant bits (MSBs) followed by the read/write bit. For the IC, the seven most significant bits are 0010000. Setting the read/write bit to 1 (slave address = 0x21) configures the IC for read mode. Setting the read/write bit to 0 (slave address = 0x20) configures the ICs for write mode. The address is the first byte of information sent to the IC after the START condition.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology The slave address with the R/W bit set to 0 indicates that the master intends to write data to the ICs. The ICs acknowledge receipt of the address byte during the master-generated 9th SCL pulse. The first byte transmitted from the ICs is the content of register 0x00. Transmitted data is valid on the rising edge of SCL. The address pointer autoincrements after each read data byte.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Applications Information Typical Operating Circuits Figures 40 and 41 provide example operating circuits for the ICs. sThe external components shown are the minimum required for the ICs to operate. Additional components may be required by the application. 2.8V TO 5.5V 1.8V 10µF 1.8V TO 3.6V 0.1µF 1.8V TO 5.5V 10µF DVDDS1 1µF PVDD DVDD 1µF AVDD 1.8V TO 3.6V 1µF 1µF SPKLVDD 1µF SPKRVDD 0.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology 2.8V TO 5.5V 1.8V 10µF 1.8V TO 3.6V 10µF 0.1µF 1.8V TO 5.5V DVDDS1 1µF PVDD DVDD 1µF AVDD 1.8V TO 3.6V 1µF 1µF SPKLVDD 1µF SPKRVDD 0.1µF DVDDS2 10kI TO MICROCONTROLLER BCLKS2 IRQ 10MHz TO 60MHz CLOCK INPUT LRCLKS2 MCLK BCLKS1 DIGITAL AUDIO PORT 1 I2C CONTROL DATA DIGITAL MIC 1 PORT LRCLKS1 SDOUTS2 SDINS1 JACKSNS SDOUTS1 RECP/RXINP SDA RECN/RXINN MIC1N/ DIGMICCLK 2.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Filterless Class D Operation In RF applications, improvements to both layout and component selection decrease the IC’s susceptibility to RF noise and prevent RF signals from being demodulated into audible noise. Trace lengths should be kept below 1/4 of the wavelength of the RF frequency of interest. Minimizing the trace lengths prevents them from functioning as antennas and coupling RF signals into the IC.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Many configuration options in the ICs can be made while the devices are operating, however, some registers should only be adjusted when the corresponding audio path is disabled. Table 39 lists the registers that are sensitive during operation. Either disable the corresponding audio path or set SHDN = 0 while changing these registers.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Charge-Pump Flying Capacitor The value of the flying capacitor (connected between C1N and C1P) affects the output resistance of the charge pump. A value that is too small degrades the device’s ability to provide sufficient current drive, which leads to a loss of output voltage. Increasing the value of the flying capacitor reduces the charge-pump output resistance to an extent.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Recommended PCB Routing The MAX98089EWY uses a 63-bump WLP package. Figure 43 provides an example of how to connect to all active bumps using 3 layers of the PCB. To ensure uninterrupted ground returns, use layer 2 as a connecting layer between layer 1 and layer 2 and flood the remaining area with ground. Supply Bypassing, Layout, and Grounding Proper layout and grounding are essential for optimum performance.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Route microphone signals from the microphone to the ICs as a differential pair, ensuring that the positive and negative signals follow the same path as closely as possible with equal trace length. When using single-ended microphones or other single-ended audio sources, ground the negative microphone input as close as possible to the audio source and then treat the positive and negative traces as differential pairs. 0.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Package Information (continued) For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Package Information (continued) For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
MAX98089 Low-Power, Stereo Audio Codec with FlexSound Technology Revision History REVISION NUMBER REVISION DATE 0 6/11 DESCRIPTION Initial release PAGES CHANGED — Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.