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General Description

The MAX9860 is a low-power, voiceband, mono audio

codec designed to provide a complete audio solution

for wireless voice headsets and other mono voice audio

devices. Using an on-chip bridge-tied load mono head-

phone amplifier, the MAX9860 can output 30mW into a

32Ω earpiece while operating from a single 1.8V power

supply. Very low power consumption makes it an ideal

choice for battery-powered applications.

The MAX9860’s flexible clocking circuitry utilizes com-

mon system clock frequencies ranging from 10MHz to

60MHz, eliminating the need for an external PLL and

multiple crystal oscillators. Both the ADC and DAC sup-

port sample rates of 8kHz to 48kHz in either synchro-

nous or asynchronous operation. Both master and slave

timing modes are supported.

Two differential microphone inputs are available with a

user-programmable preamplifier and programmable

gain amplifier. Automatic gain control with selectable

attack/release times and signal threshold allows maxi-

mum dynamic range. A noise gate with selectable

threshold provides a means to quiet the channel when

no signal is present. Both the DAC and ADC digital filters

provide full attenuation for out-of-band signals as well as

a 5th order GSM-compliant digital highpass filter. A digi-

tal side tone mixer provides loopback of the micro-

phones/ADC signal to the DAC/headphone output.

Serial DAC and ADC data is transferred over a flexible

digital I

S-compatible interface that also supports TDM

mode. Mode settings, volume control, and shutdown are

programmed through a 2-wire, I

C-compatible interface.

The MAX9860 is fully specified over the -40°C to +85°C

extended temperature range and is available in a low-

profile, 4mm x 4mm, 24-pin thin QFN package.

Applications

Audio Headsets

Portable Navigation Device

Mobile Phones

Smart Phones

VoIP Phones

Audio Accessories

Features

♦ 1.8V Single-Supply Operation

♦ Digital Highpass Elliptical Filters with Notch for

217Hz (GSM)

♦ Mono 30mW BTL Headphone Amplifier

♦ Dual Low-Noise Microphone Inputs

♦ Automatic Microphone Gain Control and Noise

Gate

♦ 90dB DAC DR (f

= 48kHz)

♦ 81dB ADC DR (f

= 48kHz)

♦ Supports Master Clock Frequencies from 10MHz

to 60MHz

♦ Supports Sample Rates from 8kHz to 48kHz

♦ Flexible Digital Audio Interface

♦ Clickless/Popless Operation

♦ 2-Wire, I

C-Compatible Control Interface

♦ Available in 24-Pin, Thin QFN, 4mm x 4mm x

0.8mm Package

MAX9860

16-Bit Mono Audio Voice Codec

________________________________________________________________

Maxim Integrated Products

19-4349; Rev 0; 10/08

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

Ordering Information

PART TEMP RANGE PIN-PACKAGE

MAX9860ETG+ -40°C to +85°C 24 TQFN-EP*

Denotes a lead-free/RoHS-compliant package.

EP = Exposed pad.

ADC

DIGITAL

AUDIO

INTERFACE

DIGITAL

FILTERING

AND

MIXERS

DIFF

MIC

DIFF

MIC

DAC

AVDD AND DVDD

1.7V TO 1.9V

DVDDIO

1.7V TO 3.6V

CLOCK

CONTROL

DIGITAL AUDIO

INPUT/OUTPUT

INTERFACE

MAX9860

Simplified Block Diagram

Pin Configuration and Typical Operating Circuit appear at

end of data sheet.

Summary of content (39 pages)

PAGE 1
9-4349; Rev 0; 10/08 16-Bit Mono Audio Voice Codec The MAX9860 is a low-power, voiceband, mono audio codec designed to provide a complete audio solution for wireless voice headsets and other mono voice audio devices. Using an on-chip bridge-tied load mono headphone amplifier, the MAX9860 can output 30mW into a 32Ω earpiece while operating from a single 1.8V power supply. Very low power consumption makes it an ideal choice for battery-powered applications.
PAGE 2
MAX9860 16-Bit Mono Audio Voice Codec ABSOLUTE MAXIMUM RATINGS (Voltages referenced to AGND.) DVDDIO, SDA, SCL, IRQ.......................................-0.3V to +3.6V AVDD, DVDD............................................................-0.3V to +2V AGND, DGND, MICGND .......................................-0.3V to +0.3V OUTP, OUTN, PREG, REF, MICBIAS ......-0.3V to (AVDD + 0.3V) MICLP, MICLN, MICRP, MICRN, REG ....-0.3V to (PREG + 0.3V) MCLK, LRCLK, BCLK, SDOUT, SDIN..................................-0.
PAGE 3
16-Bit Mono Audio Voice Codec (VAVDD = VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CMICBIAS = CPREG = CREG = 1µF, AVPRE = +20dB, AVMICPGA = 0dB, MCLK = 13MHz, LRCLK = 8kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 4
MAX9860 16-Bit Mono Audio Voice Codec ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CMICBIAS = CPREG = CREG = 1µF, AVPRE = +20dB, AVMICPGA = 0dB, MCLK = 13MHz, LRCLK = 8kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 5
16-Bit Mono Audio Voice Codec (VAVDD = VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CMICBIAS = CPREG = CREG = 1µF, AVPRE = +20dB, AVMICPGA = 0dB, MCLK = 13MHz, LRCLK = 8kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 6
MAX9860 16-Bit Mono Audio Voice Codec ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CMICBIAS = CPREG = CREG = 1µF, AVPRE = +20dB, AVMICPGA = 0dB, MCLK = 13MHz, LRCLK = 8kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.
PAGE 7
16-Bit Mono Audio Voice Codec (VDVDD = VDVDDIO = 1.8V, unless otherwise noted.
PAGE 8
MAX9860 16-Bit Mono Audio Voice Codec I2C INTERFACE ELECTRICAL CHARACTERISTICS (continued) (VDVDD = VDVDDIO = 1.8V, unless otherwise noted.) (Note 2) PARAMETER SDA Transmitting Fall Time Setup Time for STOP Condition SYMBOL tF CONDITIONS CB is in pF tSU,STO Bus Capacitance CB Pulse Width of Suppressed Spike tSP MIN TYP 20 + 0.1CB MAX UNITS 250 ns 0.6 µs 0 400 pF 50 ns DIGITAL INPUTS (LRCLK, BCLK, SDIN, MCLK) Input Voltage High VIH Input Voltage Low VIL 0.7 x DVDDIO V 0.
PAGE 9
16-Bit Mono Audio Voice Codec RL = 32Ω RL = 16Ω RL = 32Ω 1 1 f = 3.5kHz 0.1 f = 3.5kHz THD+N (%) THD+N (%) 0.1 0.01 0.01 0.001 0.001 5 10 15 POUT = 20mW f = 20kHz f = 20kHz 0.001 0 POUT = 5mW 0.1 f = 1kHz f = 1kHz 0.01 20 25 30 0 10 20 30 40 50 0.01 60 0.1 10 1 OUTPUT POWER (mW) OUTPUT POWER (mW) FREQUENCY (kHz) TOTAL HARMONIC DISTORTION + NOISE vs. FREQUENCY (DAC TO HP) TOTAL HARMONIC DISTORTION + NOISE vs.
PAGE 10
Typical Operating Characteristics (continued) (VAVDD = +1.8V, VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CPREG = CREG = 1µF, CMICBIAS = 1µF AVMICPGA = 0dB, AVPRE = +20dB, MCLK = 13MHz, TA = +25°C, unless otherwise noted.
PAGE 11
16-Bit Mono Audio Voice Codec -40 -60 -80 -100 -40 -60 -80 -100 -40 -60 -80 -100 -120 -120 -140 -140 4 3 0 1 -60dBFS FFT (MICL TO ADC) 0 4 3 20 MAX9860 toc22 MCLK = 12.288MHz LRCLK = 48kHz PLL DISABLED -40 -60 -80 -100 MCLK = 13MHz LRCLK = 8kHz PLL DISABLED RL = 32Ω 0 OUTPUT AMPLITUDE (dB) -20 -140 10 -20 -40 -60 20 15 0 -80 -100 0.1 1 10 100 1000 1 10 100 1000 ADC DIGITAL FILTER FREQUENCY RESPONSE, 8kHz 1.
PAGE 12
Typical Operating Characteristics (continued) (VAVDD = +1.8V, VDVDD = VDVDDIO = +1.8V, RL = ∞, headphone load (RL) connected between OUTP and OUTN, CREF = 2.2µF, CPREG = CREG = 1µF, CMICBIAS = 1µF AVMICPGA = 0dB, AVPRE = +20dB, MCLK = 13MHz, TA = +25°C, unless otherwise noted.
PAGE 13
16-Bit Mono Audio Voice Codec PIN 1 NAME FUNCTION MICBIAS Microphone Bias. +1.55V microphone bias for internal and/or external microphone. An external resistor from 2.2kΩ to 470Ω should be used to set the microphone current. Bypass to MICGND with a 1µF capacitor. 2 REG 3 PREG Internal Bias. PREG/2 voltage reference. Bypass to AGND with a 1µF capacitor (+0.8V). 4 REF 5 AGND 6 AVDD Analog Power Supply. Bypass to AGND with 10µF and 0.1µF capacitors.
PAGE 14
MAX9860 16-Bit Mono Audio Voice Codec Detailed Description The MAX9860 is a low-power, voiceband, mono audio codec designed to provide a complete audio solution for wireless voice headsets and other mono audio devices. The mono playback path accepts digital audio over a flexible digital audio interface compatible with I2S, TDM, and left-justified audio signals.
PAGE 15
16-Bit Mono Audio Voice Codec B7 B6 B5 B4 B3 B2 B1 B0 REGISTER ADDRESS POR R/W CLD SLD ULK 0 0 0 0 0 0x00 — R 0x01 — R 0 0x02 0x00 R/W 16KHZ 0x03 0x00 R/W 0x04 0x00 R/W 0x05 0x00 R/W REGISTER STATUS/INTERRUPT Interrupt Status Microphone NG/AGC Readback Interrupt Enable NG AGC ICLD ISLD 0 0 IULK 0 0 0 0 CLOCK CONTROL System Clock Stereo Audio Clock Control High PSCLK 0 PLL FREQ NHI Stereo Audio Clock Control Low NLO DIGITAL AUDIO INTERFACE Interface
PAGE 16
MAX9860 16-Bit Mono Audio Voice Codec Status/Interrupt Status registers 0x00 and 0x01 are read-only registers that report the status of various device functions. The status register bits are cleared upon a read operation of the status register and are set the next time the event occurs. Register 0x02 determines whether or not the status flags in register 0x00 simultaneously sets IRQ high. Table 2.
PAGE 17
16-Bit Mono Audio Voice Codec prescaled MCLK input (PCLK). This allows high flexibility in both the MCLK and LRCLK frequencies and can be used in either master or slave mode. Exact Integer Mode: Common MCLK frequencies (12MHz, 13MHz, and 19.2MHz) can be programmed to operate in exact integer mode for both 8kHz and 16kHz sample rates. In these modes, the MCLK and LRCLK rates are selected by using the FREQ and 16KHZ bits instead of the NHI, NLO, and PLL control bits.
PAGE 18
MAX9860 16-Bit Mono Audio Voice Codec Table 3. Clock Control Registers (continued) BITS FUNCTION PLL Enable 0 = (Valid for slave and master mode)—The frequency of LRCLK is set by the NHI and NLO divider bits. Set PLL = 0 in slave mode only if the externally generated LRCLK can be exactly selected using the LRCLK divider. 1 = (Valid for slave mode only)—Used when the audio master generates an LRCLK not selectable using the LRCLK divider.
PAGE 19
16-Bit Mono Audio Voice Codec master mode, the MAX9860 outputs LRCLK and BCLK, while in slave mode, they are inputs. When operating in master mode, BCLK can be configured in a number of ways to ensure compatiblity with other audio devices. Table 5.
PAGE 20
MAX9860 16-Bit Mono Audio Voice Codec Table 5. Digital Audio Interface Registers (continued) BITS ADLY ST BSEL 20 FUNCTION ADC Delay Mode 0 = SDOUT data is valid on the first BCLK edge following an LRCLK edge. 1 = SDOUT data is delayed one BCLK cycle so that it is valid on the 2nd BCLK edge following an LRCLK edge (I2S-compatible mode). ADLY is ignored when TDM = 1. Stereo Enable 0 = The interface transmits and receives only one channel of data.
PAGE 21
16-Bit Mono Audio Voice Codec MAX9860 AUDIO MASTER MODES (ST = 1): LEFT JUSTIFIED : WCI = 0, _BCI = 0, _DLY = 0 7ns (typ) 7ns (typ) LEFT LRCLK RIGHT 1/f S RELATIVE TO PCLK (NOTE 7) D15 SDOUT D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 40ns (max) 0ns (min) 7ns (typ) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 7ns (typ) BCLK 25ns (min) SDIN CONFIGURED BY BSEL 0ns (min) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 L
PAGE 22
MAX9860 16-Bit Mono Audio Voice Codec VOICE (TDM) MASTER MODES: _BCI = 0, HIZ = 1, ST = 0 7ns (typ) 7ns (typ) LRCLK 1/fS RELATIVE TO PCLK (NOTE 8) SDOUT L15 L14 L13 L12 L11 L10 L9 L8 L7 40ns (max) 0ns (min) L6 L5 L4 L3 L2 L1 7ns (typ) L0 7ns (typ) BCLK 25ns (min) SDIN CONFIGURED BY BSEL 0ns (min) L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 _BCI = 1, HIZ = 1, ST = 0 7ns (typ) 7ns (typ) LRCLK 1/fS RELATIVE TO PCLK (NOTE 8) SDOUT L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 40n
PAGE 23
16-Bit Mono Audio Voice Codec MAX9860 AUDIO SLAVE MODES (ST = 1): LEFT JUSTIFIED: WCI = 0, _BCI = 0, _DLY = 0 LEFT LRCLK RIGHT 1/fS 0ns (min) 25ns (min) SDOUT D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 40ns (max) 0ns (min) D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 30ns (min) BCLK 25ns (min) 75ns (min) 0ns (min) SDIN 30ns (min) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LEFT JUSTIFIED + LRCLK INVERT: WCI
PAGE 24
MAX9860 16-Bit Mono Audio Voice Codec VOICE (TDM) SLAVE MODES: _BCI = 0, HIZ =1, ST = 0 LRCLK 1/fS 25ns (min) SDOUT 0ns (min) 0ns (min) L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 40ns (max) 0ns (min) L2 L1 L0 30ns (min) BCLK SDIN 75ns (min) 0ns (min) 25ns (min) L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0 _BCI = 1, HIZ = 1, ST = 0 LRCLK 1/fS 25ns (min) SDOUT 0ns (min) 0ns (min) L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 40ns (max) 0ns (min) L3 L2 L1 L0 30ns (min) BCLK 25ns (min)
PAGE 25
16-Bit Mono Audio Voice Codec MAX9860 Digital Filtering The MAX9860 incorporates selecable highpass and notch filters for both the playback and record paths. Each filter is valid for a specific sample rate. Table 6. Digital Filter Registers REGISTER ADDRESS 0x08 B7 B6 B5 B4 B3 B2 AVFLT B1 B0 DVFLT BITS FUNCTION AVFLT ADC Voice Filter Frequency Select. See Table 7. DVFLT DAC Voice Filter Frequency Select. See Table 7. Table 7.
PAGE 26
MAX9860 16-Bit Mono Audio Voice Codec Digital Level Control The MAX9860 includes digital gain adjustment for the playback and record paths. Independent gain adjustment is provided for the two record channels. Sidetone gain adjustment is also provided to set the sidetone level relative to the playback level. Table 8.
PAGE 27
16-Bit Mono Audio Voice Codec MAX9860 Table 8. Digital Level Control Registers (continued) BITS FUNCTION ADCRL/ADCLL DVG DVST Left and Right ADC Output Level Adjusts the digital audio level output by the ADCs. CODE GAIN 0x0 +3 0x1 +2 0x2 +1 0x3 0 0x4 -1 0x5 -2 0x6 -3 0x7 -4 0x8 -5 0x9 -6 0xA -7 0xB -8 0xC -8 0xD -10 0xE -11 0xF -12 DAC Gain The gain set by DVG adds to the level set by DVA. CODE GAIN 00 0 01 +6 10 +12 11 +18 Sidetone Sets the level of left ADC output mixed into the DAC.
PAGE 28
MAX9860 16-Bit Mono Audio Voice Codec Microphone Inputs The MAX9860 provides two differential microphone inputs and a low-noise 1.55V microphone bias for powering the microphones. In typical applications, the left microphone is used to record a voice signal and the right microphone is used to record a background noise signal. In applications that require only one microphone, use the left microphone input and disable the right ADC. The microphone signals are amplified by two stages of MICBIAS 1.
PAGE 29
16-Bit Mono Audio Voice Codec MAX9860 Table 9. Microphone Input Register REGISTER ADDRESS 0x0C BITS PAM PGAM B7 0 B6 B5 PAM B4 B3 B2 PGAM B1 B0 FUNCTION Left and Right Microphone Preamp Gain CODE GAIN (dB) 00 Disabled 01 0 10 +20 11 +30 Note: Selecting 00 disables the microphone inputs and microphone bias automatically.
PAGE 30
MAX9860 16-Bit Mono Audio Voice Codec Automatic Gain Control (AGC) and Noise Gate The MAX9860 includes AGC on both microphone inputs. AGC is enabled by setting the hold time through AGCHLD. AGC dynamically controls the analog PGA microphone input gain to hold the level constant over a 20dB input range, enhancing the voice path operation for various use conditions.
PAGE 31
16-Bit Mono Audio Voice Codec BITS FUNCTION Noise Gate Threshold The signal level at which the noise gate begins reducing the gain. When the signal level is above the threshold the noise gate has no effect. When the signal level is below the threshold, the noise gate decreases the gain by 1dB for every 2dB the signal is below the threshold. The noise gate can be enabled independently from AGC.
PAGE 32
MAX9860 16-Bit Mono Audio Voice Codec Power Management ADCs can be independently enabled so that only the required circuitry is active. The MAX9860 includes complete power management control to minimize power usage. The DAC and both Table 11. Power Management Register REGISTER ADDRESS 0x10 B7 SHDN B6 0 B5 0 B4 0 BITS B3 DACEN B2 0 B1 ADCLEN B0 ADCREN FUNCTION Active-Low Software Shutdown 0 = MAX9860 is in full shutdown. 1 = MAX9860 is powered on. SHDN DACEN ADCLEN/ADCREN When SHDN = 0.
PAGE 33
16-Bit Mono Audio Voice Codec MAX9860 SDA tSU,STA tSU,DAT tLOW tBUF tHD,STA tHD,DAT tSP tSU,STO tHIGH SCL tHD,STA tR START CONDITION tF REPEATED START CONDITION STOP CONDITION START CONDITION Figure 6. 2-Wire Interface Timing Diagram Bit Transfer One data bit is transferred during each SCL cycle. The data on SDA must remain stable during the high period of the SCL pulse. Changes in SDA while SCL is high are control signals (see the START and STOP Conditions section).
PAGE 34
MAX9860 16-Bit Mono Audio Voice Codec S Sr P SCL SDA Figure 7. START (S), STOP (P), and REPEATED START (Sr) Conditions CLOCK PULSE FOR ACKNOWLEDGMENT START CONDITION SCL 1 28 9 NOT ACKNOWLEDGE SDA ACKNOWLEDGE Figure 8. Acknowledge ACKNOWLEDGE FROM MAX9860 B7 ACKNOWLEDGE FROM MAX9860 S SLAVE ADDRESS 0 B6 B5 B4 B3 B2 B1 B0 ACKNOWLEDGE FROM MAX9860 A REGISTER ADDRESS R/W A A DATA BYTE P 1 BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER Figure 9.
PAGE 35
16-Bit Mono Audio Voice Codec ACKNOWLEDGE FROM MAX9860 S SLAVE ADDRESS 0 A ACKNOWLEDGE FROM MAX9860 B7 B6 B5 B4 B3 B2 B1 B0 ACKNOWLEDGE FROM MAX9860 A REGISTER ADDRESS B7 B6 B5 B4 B3 B2 B1 B0 A DATA BYTE 1 R/W MAX9860 ACKNOWLEDGE FROM MAX9860 DATA BYTE n 1 BYTE A P 1 BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER Figure 10.
PAGE 36
16-Bit Mono Audio Voice Codec MICBIAS MICLP MICLN MICRP MICRN IRQ TOP VIEW MICGND MAX9860 Pin Configuration 24 23 22 21 20 19 1 18 BCLK 17 LRCLK 16 SDIN 15 SDOUT 14 MCLK 13 DVDD + AGND 5 AVDD 6 *EP 7 8 9 10 11 12 DGND 4 DVDDIO REF MAX9860 SCL 3 SDA PREG OUTN 2 OUTP REG Route microphone signals from the microphone to the MAX9860 as a differential pair, ensuring that the positive and negative signals follow the same path as closely as possible with equal t
PAGE 37
16-Bit Mono Audio Voice Codec 1.7V TO 3.6V 1.7V TO 1.9V 1.7V TO 1.9V 1μF 1μF 13 DVDD 11 DVDDIO 10μF 0.1μF 6 AVDD DIGITAL ANALOG 0, +6dB, +12dB, +24dB SDOUT 15 MONO SDIN 16 DIGITAL AUDIO INTERFACE LRCLK 17 DVG Σ 8 DVST MAX9860 P LEFT ADC ADCLL/ ADCRL TIMING AND CONTROL LOGIC LOW-LEVEL AUDIO QUIETING CONTROL P 1.
PAGE 38
Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 24 TQFN-EP T2444+4 21-0139 24L QFN THIN.
PAGE 39
16-Bit Mono Audio Voice Codec Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 39 © 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.