Instruction Manual

NUC130 Series DATA SHEET
4 BLOCK DIAGRAM
4.1 NUC130 Block Diagram
FLASH
128KB
Cortex-M0
50MHz
CLK_CTL
PDMA
ISP 4KB
SRAM
16KB
GPIO
A,B,C,D,E
PS2
SPI 2/3
UART 1 -115K CAN 0
I2C 1 -1M
Timer 2/3
RTC
WDG
I2C 0 -1M
SPI 0/1
UART 0 -3M
PWM 0~3
Timer 0/1/
12-bit ADC
Analog
Comparator
POR
Brown-out
LVR
Peripherals with PDMA
UART 2 -115K
I2S
PWM 4~7
10 kHz
32 KHz
P
L
L
22 MHz
12 MHz
LDO
2.5V~
5.5V
Figure 4-1 NUC130 Block Diagram
Publication Release Date: May 31, 2010
- 21 - Revision V1.02