Instruction Manual

NUC130 Series DATA SHEET
Publication Release Date: May 31, 2010
- 7 - Revision V1.02
• Timers
– 4 sets of 24-bit timer with 8-bit prescaler.
– Counter auto reload.
• Watch Dog Timer
– Default ON/OFF by configuration setting
– Multiple clock sources
– 8 selectable time out period from 6ms ~ 3.0sec (depends on clock source)
– WDT can wake up power down/sleep.
– Interrupt or reset selectable on watchdog time-out.
• RTC
– Support software compensation by setting frequency compensate register (FCR)
– Support RTC counter (second, minute, hour) and calendar counter (day, month, year)
– Support Alarm registers (second, minute, hour, day, month, year)
– Selectable 12-hour or 24-hour mode
– Automatic leap year recognition
– Support time tick interrupt
– Support wake up function.
• PWM/Capture
– Built-in up to four 16-bit PWM generators provide eight PWM outputs or four complementary
paired PWM outputs.
– Each PWM generator equipped with one clock source selector, one clock divider, one 8-bit
prescaler and one Dead-Zone generator for complementary paired PWM.
– PWM interrupt synchronous to PWM period.
– Up to eight 16-bit digital Capture timers (shared with PWM timers) provide eight rising/falling
capture inputs.
– Support Capture interrupt
• UART
– Three compatible 16550 UART devices.
– UART ports with flow control (TX, RX, CTS and RTS)
– UART0 with 64-byte FIFO is for high speed
– UART1/2 with 16-byte FIFO for standard device
– Support IrDA (SIR) and LIN function
– Programmable baud-rate generator up to 1/16 system clock
–
Support PDMA mode
• SPI
– Up to four sets of SPI device.
– Master up to 16 Mbps / Slave up to 10 Mbps.
– Support MICROWIRE/SPI master/slave mode (SSP)
– Full duplex synchronous serial data transfer
– Variable length of transfer data from 1 to 32 bits
– MSB or LSB first data transfer
– Rx and Tx on both rising or falling edge of serial clock independently
– 2 slave/device select lines when it is as the master, and 1 slave/device select line when it is as
the slave
– Byte Sleeping mode in 32-bit transmission
– Support PDMA mode