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Features

•

Single Voltage Operation

–5V Read

– 5V Programming

•

Fast Read Access Time - 55 ns

•

Internal Erase/Program Control

•

Sector Architecture

– One 8K Words (16K bytes) Boot Block with Programming Lockout

– Two 4K Words (8K bytes) Parameter Blocks

– One 240K Words (480K bytes) Main Memory Array Block

•

Fast Sector Erase Time - 10 seconds

•

Byte-by-Byte or Word-By-Word Programming - 10 µs Typical

•

Hardware Data Protection

•

DATA Polling For End Of Program Detection

•

Low-Power Dissipation

– 50 mA Active Current

– 300 µA CMOS Standby Current

•

Typical 10,000 Write Cycles

Description

The AT49F004(T) and AT49F4096A(T) are 5-volt, 4-megabit Flash Memories orga-

nized as 524,288 words of 8 bits each or 256K words of 16 bits each. Manufactured

with Atmel’s advanced nonvolatile CMOS technology, the devices offer access times

to 55 ns with power dissipation of just 275 mW. When deselected, the CMOS standby

current is less than 300 µA.

The device contains a user-enabled “boot block” protection feature. Two versions of

the feature are available: the AT49F004/4096A locates the boot block at lowest order

addresses (“bottom boot”); the AT49F004T/4096AT locates it at highest order

addresses (“top boot”).

To allow for simple in-system reprogrammability, the AT49F004(T)/4096A(T) does not

require high input voltages for programming. Reading data out of the device is similar

to reading from an EPROM; it has standard CE

, OE, and WE inputs to avoid bus con-

tention. Reprogramming the AT49F004(T)/4096A(T) is performed by first erasing a

4-Megabit

(512K x 8/

256K x 16)

Flash Memory

AT49F004

AT49F004T

AT49F4096A

AT49F4096AT

Preliminary

Rev. 1167A–09/98

Pin Configurations

Pin Name Function

A0 - A18 Addresses

Chip Enable

Output Enable

WE Write Enable

RESET

Reset

RDY/BUSY

Ready/Busy Output

I/O0 - I/O14 Data Inputs/Outputs

I/O15(A-1)

I/O15 (Data Input/Output, Word Mode)

A-1 (LSB Address Input, Byte Mode)

BYTE

Selects Byte or Word Mode

NC No Connect

(continued)

Summary of content (16 pages)

PAGE 1
Features • Single Voltage Operation • • • • • • • • • – 5V Read – 5V Programming Fast Read Access Time - 55 ns Internal Erase/Program Control Sector Architecture – One 8K Words (16K bytes) Boot Block with Programming Lockout – Two 4K Words (8K bytes) Parameter Blocks – One 240K Words (480K bytes) Main Memory Array Block Fast Sector Erase Time - 10 seconds Byte-by-Byte or Word-By-Word Programming - 10 µs Typical Hardware Data Protection DATA Polling For End Of Program Detection Low-Power Dissipation – 50 m
PAGE 2
AT49F4096A(T) SOIC (SOP) NC NC A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE I/O0 I/O8 I/O1 I/O9 I/O2 I/O10 I/O3 I/O11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 RESET WE A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE GND I/O15/A-1 I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC AT49F4096A(T) TSOP Top View Type 1 A15 A14 A13 A12 A11 A10 A9 A8 NC NC WE RESET NC NC NC NC A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
PAGE 3
AT49F004/4096A(T) AT49F004(T) Block Diagram AT49F004 VCC AT49F004T DATA INPUTS/OUTPUTS I/O0 - I/O7 DATA INPUTS/OUTPUTS I/O0 - I/O7 INPUT/OUTPUT BUFFERS INPUT/OUTPUT BUFFERS PROGRAM DATA LATCHES PROGRAM DATA LATCHES GND OE WE CE RESET CONTROL LOGIC Y DECODER ADDRESS INPUTS X DECODER Y-GATING MAIN MEMORY (480K BYTES) PARAMETER BLOCK 2 8K BYTES PARAMETER BLOCK 1 8K BYTES BOOT BLOCK 16K BYTES Y-GATING 7FFFF 08000 07FFF 06000 05FFF 04000 03FFF 00000 BOOT BLOCK 16K BYTES PARAMETER BLOCK 1 8K BYTE
PAGE 4
device is in its standard operating mode. A low level on the RESET input halts the present device operation and puts the outputs of the device in a high impedance state. When a high level is reasserted on the RESET pin, the device returns to the Read or Standby mode, depending upon the state of the control inputs. By applying a 12V ± 0.
PAGE 5
AT49F004/4096A(T) For details, see Operating Modes (for hardware operation) or Software Product Identification. The manufacturer and device code is the same for both modes. DATA POLLING: The AT49F004(T)/4096A(T) features DATA polling to indicate the end of a program cycle. During a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin.
PAGE 6
Command Definition (in Hex)(1) Command Sequence 1st Bus Cycle Bus Cycles Addr Data Read 1 Addr DOUT Chip Erase 6 5555 AA 2nd Bus Cycle 3rd Bus Cycle 4th Bus Cycle Data Addr Data Addr Data Addr Data Addr Data 2AAA 55 5555 80 5555 AA 2AAA 55 5555 10 2AAA 55 (4) SA 30 2AAA 55 5555 40 6 5555 AA 2AAA 55 5555 80 5555 AA Byte/Word Program 4 5555 AA 2AAA 55 5555 A0 Addr DIN Boot Block Lockout(2) 6 5555 AA 2AAA 55 5555 80 5555 AA Product ID Ent
PAGE 7
AT49F004/4096A(T) DC and AC Operating Range Operating Temperature (Case) AT49F004(T)/4096A(T)-55 AT49F004(T)/4096A(T)-70 AT49F004(T)/4096A(T)-90 0°C - 70°C 0°C - 70°C 0°C - 70°C N/A -40°C - 85°C -40°C - 85°C 5V ± 10% 5V ± 10% 5V ± 10% Com. Ind.
PAGE 8
AC Read Characteristics AT49F004(T)/4096A(T)-55 Min AT49F004(T)/4096A(T)-70 Symbol Parameter Max Min tACC Address to Output Delay 55 tCE(1) CE to Output Delay 55 tOE(2) OE to Output Delay 0 30 0 35 tDF(3)(4) CE or OE to Output Float 0 25 0 25 tOH Output Hold from OE,CE or Address, whichever occurred first 0 tRO RESET to Output Delay AT49F004(T)/4096A(T)-90 Max Min Max Units 70 90 ns 70 90 ns 0 40 ns 0 25 ns 0 0 800 800 ns 800 ns AC Read Waveforms(1)(2)(3)(
PAGE 9
AT49F004/4096A(T) AC Word Load Characteristics Symbol Parameter Min Max Units tAS, tOES Address, OE Set-up Time 10 ns tAH Address Hold Time 100 ns tCS Chip Select Set-up Time 0 ns tCH Chip Select Hold Time 0 ns tWP Write Pulse Width (WE or CE) 100 ns tDS Data Set-up Time 100 ns tDH, tOEH Data, OE Hold Time 10 ns tWPH Write Pulse Width High 50 ns AC Byte/Word Load Waveforms WE Controlled CE Controlled 9
PAGE 10
Program Cycle Characteristics Symbol Parameter Min tBP Byte/Word Programming Time tAS Address Set-up Time tAH Typ Max Units 10 50 µs 0 ns Address Hold Time 100 ns tDS Data Set-up Time 100 ns tDH Data Hold Time 0 ns tWP Write Pulse Width 100 ns tWPH Write Pulse Width High 50 ns tEC Erase Cycle Time 10 seconds Program Cycle Waveforms PROGRAM CYCLE OE CE t WP t BP t WPH WE t AS A0-A18 t DH t AH 5555 5555 2AAA 5555 ADDRESS t DS 55 AA DATA A0 AA INPUT DATA
PAGE 11
AT49F004/4096A(T) Data Polling Characteristics(1) Symbol Parameter Min tDH Data Hold Time 10 ns tOEH OE Hold Time 10 ns Max (2) tOE OE to Output Delay tWR Write Recovery Time Notes: Typ Units ns 0 ns 1. These parameters are characterized and not 100% tested. 2. See tOE spec in AC Read Characteristics.
PAGE 12
Software Product Identification Entry(1) LOAD DATA AA TO ADDRESS 5555 Boot Block Lockout Enable Algorithm(1) LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA 80 TO ADDRESS 5555 LOAD DATA 90 TO ADDRESS 5555 LOAD DATA AA TO ADDRESS 5555 ENTER PRODUCT IDENTIFICATION MODE(2)(3)(5) Software Product Identification Exit(1)(6) LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA OR LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA F0 TO ANY ADDRESS LOAD DATA 40
PAGE 13
AT49F004/4096A(T) AT49F004(T) Ordering Information tACC (ns) ICC (mA) Standby Active Ordering Code Package 55 50 0.3 AT49F004-55TC 40T Commercial (0° to 70°C) 70 50 0.3 AT49F004-70TC 40T Commercial (0° to 70°C) AT49F004-70TI 40T Industrial (-40° to 85°C) AT49F004-90TC 40T Commercial (0° to 70°C) AT49F004-90TI 40T Industrial (-40° to 85°C) 90 50 0.3 Operation Range 55 50 0.3 AT49F004T-55TC 40T Commercial (0° to 70°C) 70 50 0.
PAGE 14
AT49F4096A(T) Ordering Information ICC (mA) tACC (ns) Active Standby Ordering Code Package 55 50 0.3 AT49F4096A-55RC AT49F4096A-55TC 44R 48T Commercial (0° to 70°C) 70 50 0.3 AT49F4096A-70RC AT49F4096A-70TC 44R 48T Commercial (0° to 70°C) AT49F4096A-70RI AT49F4096A-70TI 44R 48T Industrial (-40° to 85°C) AT49F4096A-90RC AT49F4096A-90TC 44R 48T Commercial (0° to 70°C) AT49F4096A-90RI AT49F4096A-90TI 44R 48T Industrial (-40° to 85°C) 90 50 0.3 55 50 0.
PAGE 15
AT49F004/4096A(T) Packaging Information 44R, 44-Lead, 0.
PAGE 16
Atmel Headquarters Atmel Operations Corporate Headquarters Atmel Colorado Springs 2325 Orchard Parkway San Jose, CA 95131 TEL (408) 441-0311 FAX (408) 487-2600 Europe 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL (719) 576-3300 FAX (719) 540-1759 Atmel Rousset Atmel U.K., Ltd.