Owner manual

81 Rev. F - 15 February, 2001
T89C51RD2
9.5.6. External Data Memory Read Cycle
9.5.7. Serial Port Timing - Shift Register Mode
Table 44. Symbol Description
Symbol Parameter
T
XLXL
Serial port clock cycle time
T
QVHX
Output data set-up to clock rising edge
T
XHQX
Output data hold after clock rising edge
T
XHDX
Input data hold after clock rising edge
T
XHDV
Clock rising edge to input data valid
Table 45. AC Parameters for a Fix Clock
Symbol -M -L
Units
Min Max Min Max
T
XLXL
300 300 ns
T
QVHX
200 200 ns
T
XHQX
30 30 ns
T
XHDX
0 0 ns
T
XHDV
117 117 ns
ALE
PSEN
RD
PORT 0
PORT 2
A0-A7 DATA IN
ADDRESS
OR SFR-P2
T
AVWL
T
LLWL
T
RLAZ
ADDRESS A8-A15 OR SFR P2
T
RHDZ
T
WHLH
T
RLRH
T
LLDV
T
RHDX
T
LLAX
T
AV D V