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Features

• 1024 x 1024 Pixels with Memory Zone

• Up to 60 Images/Second

• Built-in Antiblooming Device Providing an Electronic Shutter Function

• Pixel: 14 µmx14µm

• Image Zone: 14.34 x 14.34 mm²

• Four Outputs (256 x 1024 pixels) at 20 MHz Each

• Possible Binning 2 x 2

• Optical Shield against Parasitic Reflexions and Stray Light

• A/R Window in 400 - 700 nm Bandwidth

Description

The TH7887A is especially designed for high data rate applications (up to 60 pict/s) in

medical and industrial fields.

This area array image sensor consists of a 1024 x 1024 pixels (14

µmx14µm) image

zone associated to a memory zone (masked with optical shield).

In order to increase data rate, the image zone is divided into four zones (256 x 1024

each) which are read in parallel through 4 different outputs (readout frequency up to

20 MHz/output leading to a total readout frequency of 80 MHz).

The TH7887A is designed with antiblooming gates.

Moreover, the 2 x 2 binning mode is available on this sensor. In this case, the image

size is 512 x 512 with 28

µmx28µm pixels. Each output will read 128 x 512 pixels.

The TH7887A is sealed with a specific anti-reflective window optimized in 400 -

700 nm bandwidth.

Area Array CCD

Image Sensor

1024 x 1024

Pixels with

Antiblooming

TH7887A

Rev. 2146A–IMAGE–05/02

Summary of content (20 pages)

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Features • • • • • • • • • 1024 x 1024 Pixels with Memory Zone Up to 60 Images/Second Built-in Antiblooming Device Providing an Electronic Shutter Function Pixel: 14 µm x 14 µm Image Zone: 14.34 x 14.34 mm² Four Outputs (256 x 1024 pixels) at 20 MHz Each Possible Binning 2 x 2 Optical Shield against Parasitic Reflexions and Stray Light A/R Window in 400 - 700 nm Bandwidth Description The TH7887A is especially designed for high data rate applications (up to 60 pict/s) in medical and industrial fields.
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Figure 1.
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TH7887A Pin Identification AA ΦR VSS VDDP N.
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Pin Number Symbol Designation AA1 VOS1 AA2 VOS2 AA3 VOS3 AA4 VOS4 AA8 ΦR Reset clock C8 ΦA Antiblooming gate clock W6 VDR C1 VA Video output signal AA7, V1, W1 VSS W7, A8, B8 VSS Reset bias Antiblooming diode bias Substrate bias B6, B1, A1, B3 VSS Note: 1. Short circuited on package.
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TH7887A Geometrical Characteristics The image zone features 1024 useful lines (+ 20 extra lines) of 1024 pixels. For readout only, the full frame is split into 4 blocks of 256 columns. The video line consists of 256 useful pixels, and 273 elements in total (for each output). Figure 2.
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Figure 3. Pixel Layout ΦA VA ΦA ΦA VA ΦA A Φ P1 Φ P2 14 µm Φ P3 Φ P4 Φ P1 A' Aperture 10.3 µm 14 µm Figure 4.
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TH7887A Absolute Maximum Ratings* *NOTICE: Storage Temperature .................................... -55°C to + 150°C Operating Temperature............................... -40°C to + 85°C Thermal Cycling.........................................................15°C/mm Stresses above those listed under absolute maximum ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability.
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Timing Diagram The following diagrams are given for: • 20 MHz readout frequency • 1.25 MHz vertical transfer frequency Readout of one image is performed in 2 steps: • image zone to memory zone transfer • memory zone to register transfer and readout of register This last step is also an integration period, the duration of which can also be increased according to the required frame rates. Figure 5.
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TH7887A Figure 6. Line Timing Diagram Item fig.8 7To 5To Φ M1=Φ M Φ M2 5To 3To Φ M3 Φ M4 3To See fig. 9 3To 3To 100 ns min. 100 ns min. Φ L1 Φ L2 ΦR Vos 1,2,3,4 1 17 18 273 min 1 2 17 1 1 1 : 17 inactive pre-scan elements 2 : 256 useful video pixels Figure 7. Vertical Transfer During Image to Memory Zone Transfer 20 ns < tr < 2 To 20 ns < tf < 2 To 100 ns min. 100 ns min. ΦA 1 2 1044 Φ P1 Φ P2 Φ P3 Φ P4 Φ M1= Φ M Φ M2 Φ M3 Φ M4 See fig.
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Figure 8. Transfer Period from Image Zone to Memory Zone (ΦP and ΦM) for 1.25 MHz Vertical Transfer Frequency (Fv = 1/Tv) Tv=800 ns Φ P1 =Φ M1 tr 3 To tf 5 To 25 ns < tr < To/3 25 ns < tf < To/3 Φ P2 =Φ M2 5 To To = 100 ns Φ P3 =Φ M3 3 To 5 To Φ P4 =Φ M4 3 To To = Tv / 8 Figure 9. Output Diagram for Readout Register and Reset Clock 20 MHz Applications 50 ns 16 ns min 16 ns min Φ L1 t1 t1 Φ L2 A 12 ns min 0.3A ΦR t2 Vos 1,2,3,4 t2 td td Signal level Reset feedthrough t1 = 10 ns typ.
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TH7887A Binning Mode Operation In this mode, the image is composed of 512 x 512 pixels (28 µm x 28 µm each). Figure 10. Summation in the Readout Register of 2 Adjacent Lines. 15 To Fall times and rise times: see figures 8 & 9 5To 3To 5To Φ M1 5To 3To 5To Φ M2 Φ M3 3To Φ M1 3To 5To 3T0 3To 5To 3To 3To Φ M =Φ M1 100 ns min 100 ns min Φ L1 Φ L2 Figure 11.
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Exposure Time Reduction The TH7887A allows exposure time control (electronic shutter function). The exposure time reduction is achieved by pulsing all the Φ Pi gates to 0V to continuously remove all photogenerated electrons through antiblooming drain VA. Figure 12. Timing Diagram for Electronic Shutter Image period ΦA 1 µs 1 µs Φ P1 Φ P2 Φ P3 Φ P4 Obturation Transfer Integration Fall times and rise times: see figures 7 & 8 Table 2.
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TH7887A Table 2. Drive Clock Characteristics (Continued) Value Parameter Symbol Min Typ Max Unit 10 0 11 0.5 12 0.8 V V 8.5 0 9 0.5 9.5 0.8 V V Remarks ΦR Reset gate High level Low level Typical input capacitance 10 pF ΦL1, 2 Readout register clocks High level Low level Φ L1 Φ L2 50 pF 60 pF 75 pF Maximum readout register frequency ΦFH – 20 23 MHz See Figure 9 Image zone to memory zone transfer frequency ΦFV – 1.25 1.7 MHz See Figure 14 Figure 13.
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Electrical Performances Table 3. Static and Dynamic Electrical Characteritics Value Parameter Symbol Min Typ Max Unit Remarks Output amplier supply current IDD – 8.5 – mA per amplifier Output impedance ZS 200 225 250 Ω DC output level VREF – 11.5 – V Output conversion factor CVF 7.8 8 8.2 µV/ e- Electro-optical Performances • General test conditions: – Top = 25°C (package back temperature). – Light source: 2854K with 2 mm BG38 filter (unless specified) + F/3.
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TH7887A Table 4. Electro-Optical Performance Characteristics (Continued) Value Parameter Symbol Min Typ Max Unit Horizontal modulation transfer function at 500 nm MTF – 70 – % Vertical charge transfer inefficiency VCTI – – 2.10-5 (8) Horizontal charge transfer inefficiency HCTI – – 7.10-5 (9) Notes: Remarks (7) 1. Pixel saturation (full well) as a function of vertical transfer frequency (see Figure 14) and antiblooming adjustment (see Figure 15). 2.
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Figure 15. Saturation Level Limitation by the Antiblooming Effect on the Pixel 3 Saturation Output Level (Volts) Readout stage limit 2.5 Inefficient antiblooming 2 Efficient antiblooming 1.5 1 0.5 1.2 MHz vertical transfer frequency 0 2 3 4 5 7 6 8 9 ΦA High Clock Level (Volts) Figure 16. Smearing Effect 100 60 images / sec. 1.
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TH7887A Figure 17. Spectral Response Quantum efficiency (%) 20 15 10 5 0 400 450 500 550 600 650 700 750 800 850 900 950 1000 1050 1100 Lambda (mm) Image Quality Grade Blemish Max area of 2 x 2 defective pixels. Clusters Less than 7 contiguous defects in a column. Columns More than 7 contiguous defects in a column.
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Number of Defects Total pixel number affected by blemishes and clusters 100 Maximum number of clusters 10 Maximum number of columns 5 α : amplitude of video signal of defect with respect to mean output voltage Vos Ordering Code 18 TH7887AVRH TH7887A 2146A–IMAGE–05/02
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TH7887A Outline Drawing TOP VIEW 55.88 28.5 25 x 2.54±0.25 1.75 y 33.5 42.5 x = 0.45 ± 0.10 y = 7.17 ± 0.10 36.6 Φ0.46 4.6 0.51 3.64±0.40 1.06±0.1 2.54 32.25 2.54 typ Φ 2.2 ± 0.04 1 2 3 4 5 6 7 8 14.25 Φ 2.2 ± 0.05 AA W V C B A 40.
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Atmel Headquarters Atmel Operations Corporate Headquarters Memory 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 487-2600 Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland TEL (41) 26-426-5555 FAX (41) 26-426-5500 Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL (852) 2721-9778 FAX (852) 2722-1369 Japan Atmel Japan K.K. 9F, Tonetsu Shinkawa Bldg.