Manual

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Features

• Supply Voltage 4.5 V to 5.5 V

• Operating Temperature Range -40°C to +85°C

• Minimal External Circuitry Requirements, No RF Components on the PC Board Except

Matching to the Receiver Antenna

• High Sensitivity, Especially at Low Data Rates

• Sensitivity Reduction Possible Even While Receiving

• Fully Integrated VCO

• Low Power Consumption Due to Configurable Self Polling with a Programmable Time

Frame Check

• Single-ended RF Input for Easy Matching to l/4 Antenna or Printed Antenna on PCB

• Low-cost Solution Due to High Integration Level

• ESD Protection According to MIL-STD 883 (4 KV HBM) Except Pin POUT (2 KV HBM)

• High Image Frequency Suppression Due to 1 MHz IF in Conjunction with a SAW Front-

end Filter. Up to 40 dB is Thereby Achievable with Newer SAWs

• Programmable Output Port for Sensitivity Selection or for Controlling External

Periphery

• Communication to the Microcontroller Possible via a Single, Bi-directional Data Line

• Power Management (Polling) is also Possible by Means of a Separate Pin via the

Microcontroller

Description

The U3745BM is a multi-chip PLL receiver device supplied in an SO20 package. It has

been specially developed for the demands of RF low-cost data transmission systems

with low data rates from 1 kBaud to 10 kBaud in Manchester or Bi-phase code. The

receiver is well suited to operate with Atmel’s PLL RF transmitter U2745B. It can be

used in the frequency receiving range of f

= 310 MHz to 440 MHz for ASK data trans-

mission. All the statements made below refer to 433.92-MHz and 315-MHz

applications.

The main applications of the U3745BM are in the areas of outside temperature meter-

ing, socket control, garage door opener, consumption metering, light/fan or air-

condition control, jalousies, wireless keyboard and various other consumer market

applications.

UHF ASK

Receiver IC

U3745BM

Rev. 4663A–RKE–06/03

Summary of content (29 pages)

PAGE 1
Features • Supply Voltage 4.5 V to 5.
PAGE 2
System Block Diagram UHF ASK/FSK Remote control transmitter 1 Li cell UHF ASK Remote control receiver U3745BM U2745B Data interface Demod. Keys Encoder M44Cx9x 1...3 µC PLL IF Amp Antenna Antenna XTO VCO PLL Power amp. LNA XTO VCO Pin Configuration Figure 1.
PAGE 3
U3745BM Pin Description Pin Symbol Function 1 NC Not connected 2 ASK ASK high 3 CDEM Lower cut-off frequency data filter 4 AVCC Analog power supply 5 AGND Analog ground 6 DGND Digital ground 7 MIXVCC Power supply mixer 8 LNAGND High-frequency ground LNA and mixer 9 LNA_IN RF input 10 NC Not connected 11 LFVCC Power supply VCO 12 LF Loop filter 13 LFGND Ground VCO 14 XTO Crystal oscillator 15 DVCC Digital power supply 16 MODE Selecting 433.92 MHz/315 MHz.
PAGE 4
Block Diagram VS ASK Demodulator and data filter CDEM RSSI AVCC 50 kW DEMOD_OUT DATA Limiter out ENABLE IF Amp Sensitivity reduction Polling circuit and control logic AGND POUT MODE 4th Order DGND TEST FE CLK DVCC Standby logic LPF 3 MHz MIXVCC LFGND LNAGND LFVCC IF Amp LPF 3 MHz VCO XTO XTO f LNA_IN LF LNA ¸ 64 4 U3745BM 4663A–RKE–06/03
PAGE 5
U3745BM RF Front End The RF front end of the receiver is a heterodyne configuration that converts the input signal into a 1-MHz IF signal. According to the block diagram, the front end consists of an LNA (low noise amplifier), LO (local oscillator), a mixer and RF amplifier. The LO generates the carrier frequency for the mixer via a PLL synthesizer. The XTO (crystal oscillator) generates the reference frequency fXTO.
PAGE 6
To determine fLO, the construction of the IF filter must be considered at this point. The nominal IF frequency is fIF = 1 MHz. To achieve a good accuracy of the filter’s corner frequencies, the filter is tuned by the crystal frequency fXTO. This means that there is a fixed relation between fIF and fLO that depends on the logic level at pin mode. This is described by the following formulas: f LO MODE = 0 (USA) f IF = --------314 fLO MODE = 0 (Europe) f IF = ----------------432.
PAGE 7
U3745BM Figure 3. Input Matching Network with SAW Filter 8 8 LNAGND U3745BM 9 C3 L 22p 25n 100p C2 33n 47p 25n 100p f RF = 315 MHz TOKO LL2012 F27NJ 1 B3555 IN IN_GND 5 OUT OUT_GND 6 CASE_GND 3,4 7,8 8.2p 82n C2 C17 L3 47n L2 TOKO LL2012 F82NJ RFIN 2 LNA_IN C16 8.2p L3 27n L2 TOKO LL2012 F33NJ L C17 fRF = 433.92 MHz RFIN U3745BM 9 C3 LNA_IN C16 LNAGND 1 2 B3551 IN IN_GND 22p TOKO LL2012 F47NJ 5 OUT OUT_GND 6 CASE_GND 3,4 7,8 10p Figure 4.
PAGE 8
Analog Signal Processing IF Amplifier The signals coming from the RF front end are filtered by the fully integrated 4th-order IF filter. The IF center frequency is fIF = 1 MHz for applications where fRF = 315 MHz or fRF = 433.92 MHz is used. For other RF input frequencies, refer to Table 1 to determine the center frequency. The receiver U3745BM employs an IF bandwidth of BIF = 600 kHz. This IC can be used together with the U2745B.
PAGE 9
U3745BM The U3745BM is designed to operate with data coding where the DC level of the data signal is 50%. This is valid for Manchester and Bi-phase coding. If other modulation schemes are used, the DC level should always remain within the range of VDC_min = 33% and VDC_max = 66%. The sensitivity may be reduced by up to 1.5 dB in that condition. Each BR_Range is also defined by a minimum and a maximum edge-to-edge time (tee_sig). These limits are defined in the section “Electrical Characteristics”.
PAGE 10
Polling Circuit and Control Logic The receiver is designed to consume less than 1 mA while being sensitive to signals from a corresponding transmitter. This is achieved via the polling circuit. This circuit enables the signal path periodically for a short time. During this time the bit check logic verifies the presence of a valid transmitter signal. Only if a valid signal is detected the receiver remains active and transfers the data to the connected microcontroller.
PAGE 11
U3745BM • USA Applications (fXTO = 4.90625 MHz, MODE = L, TClk = 2.0383 µs) • Europe Applications (fXTO = 6.76438 MHz, MODE = H, TClk = 2.0697 µs) • Other applications (TClk is dependent on fXTO and on the logical state of pin MODE. The electrical characteristic is given as a function of TClk). The clock cycle of some function blocks depends on the selected baud rate range (BR_Range) which is defined in the OPMODE register.
PAGE 12
XSleepTemp = 1 implies the temporary extension factor. The extended sleep time is used as long as every bit check is OK. If the bit check fails once, this bit is set back to 0 automatically resulting in a regular sleep time. This functionality can be used to save current in presence of a modulated disturber similar to an expected transmitter signal. The connected microcontroller is rarely activated in that condition.
PAGE 13
U3745BM Figure 8. Timing Diagram for a Completely Successful Bit Check ( Number of checked Bits: 3 ) Bit check ok Enable IC Bit check 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit Dem_out DATA Polling - Mode Receiving mode Bit Check Mode In bit check mode, the incoming data stream is examined to distinguish between a valid signal from a corresponding transmitter and signals due to noise.
PAGE 14
TLim_min = Lim_min ´ TXClk TLim_max = (Lim_max –1) ´ TXClk Lim_min and Lim_max are defined by a 5-bit word each within the LIMIT register. Using the above formulas, Lim_min and Lim_max can be determined according to the required TLim_min , TLim_max and TXClk. The time resolution when defining TLim_min and TLim_max is TXClk. The minimum edge-to-edge time tee (tDATA_L_min, tDATA_H_min) is defined according to the section “Receiving Mode”. Due to this, the lower limit should be set to Lim_min ³10.
PAGE 15
U3745BM Figure 12. Timing Diagram for Failed Bit Check (condition: CV_Lim ³ Lim_max) (Lim_min = 14, Lim_max = 24 ) Bit check failed (CV_Lim = Lim_max ) Enable IC Bit check 1/2 Bit Dem_out Bit check Counter 0 Startup Mode Duration of the Bit Check 1 2 3 4 5 6 7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Bitcheck Mode 0 Sleep Mode If no transmitter signal is present during the bit check, the output of the demodulator delivers random signals.
PAGE 16
Figure 13. Synchronization of the Demodulator Output T XClk Clock Bit check counter Dem_out DATA t ee Figure 14. Debouncing of the Demodulator Output Dem_out DATA Lim_min £ CV_Lim < Lim_max t tmin1 ee CV_Lim < Lim_min or CV_Lim ³ Lim_max t tmin2 ee Figure 15.
PAGE 17
U3745BM this pulse, the sleep time TSleep elapses. The receiver remains in sleep mode as long as ENABLE is held to ‘L’. If the receiver is polled exclusively by a microcontroller, TSleep can be programmed to 0 to enable a instantaneous response time. This command is the faster option than via pin DATA at the cost of an additional connection to the microcontroller. Figure 16.
PAGE 18
Table 2. Effect of Bit 1 and Bit 2 in Programming the Registers Bit 1 Bit 2 1 x Action The receiver is set back to polling mode (OFF command) 0 1 The OPMODE register is programmed 0 0 The LIMIT register is programmed Table 4 and the following illustrate the effect of the individual configuration words. The default configuration is highlighted for each word. BR_Range sets the appropriate baud rate range. At the same time it defines XLim.
PAGE 19
U3745BM Table 5. Effect of the Configuration Word NBitcheck NBitcheck BitChk1 BitChk0 Number of Bits to be Checked 0 0 0 0 1 3 1 0 6 (Default) 1 1 9 Table 6. Effect of the Configuration Bit VPOUT VPOUT Level of the Multi-purpose Output Port POUT POUT 0 0 (Default) 1 1 Table 7.
PAGE 20
Table 9. Effect of the Configuration Word Lim_min Lim_min Lower Limit Value for Bit Check Lim_min < 10 is not applicable (TLim_min = Lim_min ´ XLim ´ TClk) 0 0 1 0 1 0 10 0 0 1 0 1 1 11 0 0 1 1 0 0 12 0 0 1 1 0 1 13 0 0 1 1 1 0 14 (Default) (USA: TLim_min = 228 µs, Europe: TLim_min = 232 µs) . . . . . . . . . . . . . . . . . . 1 1 1 1 0 1 61 1 1 1 1 1 0 62 1 1 1 1 1 1 63 Table 10.
PAGE 21
U3745BM • If the receiver is set back to polling mode via pin DATA, RM cannot be canceled by accident if t1 is applied according to the proposal in the section “Programming the Configuration Registers”. By means of that mechanism, the receiver cannot lose its register information without communicating that condition via the reset marker RM. Figure 18. Generation of the Power-on Reset V S V ThReset POR t Rst DATA (U3745BM) X 1 / f RM Figure 19.
PAGE 22
Figure 20. One-wire Connection to a Microcontroller U3745BM mC Internal pull-up resistor Bi-directional data line DATA I/O Out 1 (mC) DATA (U3745BM) To start programming, the serial data line DATA is pulled to ‘L’ for the time period t1 by the microcontroller. When DATA has been released, the receiver becomes the master device. When the programming delay period t2 has elapsed, it emits 14 subsequent synchronization pulses with the pulse length t3.
PAGE 23
U3745BM Absolute Maximum Ratings Parameters Max. Unit Supply voltage Symbol VS 6 V Power dissipation Ptot 450 mW Tj 150 °C Junction temperature Min. Storage temperature Tstg -55 +125 °C Ambient temperature Tamb -40 +85 °C 10 dBm Maximum input level, input matched to 50 W Pin_max Thermal Resistance Parameters Symbol Value Unit RthJA 100 K/W Junction ambient Electrical Characteristics All parameters refer to GND, VS = 5 V, Tamb = 25°C, f0 = 433.
PAGE 24
Electrical Characteristics (Continued) All parameters refer to GND, VS = 5 V, Tamb = 25°C, f0 = 433.92 MHz and f0 = 315 MHz, unless otherwise specified. The possible operating range refer to different circuit conditions: VS = 4.5 V to 5.5 V, Tamb = -40°C to +85°C Parameters XTO operating frequency Test Conditions XTO crystal frequency, appropriate load capacitance must be connected to XTAL 6.764375 MHz Symbol fXTO 4.90625 MHz Series resonance resistor of the crystal fXTO = 6.764 MHz 4.
PAGE 25
U3745BM Electrical Characteristics (Continued) All parameters refer to GND, VS = 5 V, Tamb = 25°C, f0 = 433.92 MHz and f0 = 315 MHz, unless otherwise specified. The possible operating range refer to different circuit conditions: VS = 4.5 V to 5.5 V, Tamb = -40°C to +85°C Parameters Test Conditions Threshold voltage for reset Symbol Min. Typ. Max. Unit VThRESET 1.95 2.8 3.75 V 39 0.08 50 0.3 61 2.5 41 540 V kW µs pF pF 0.08 VS-0.14V 0.
PAGE 26
Electrical Characteristics All parameters refer to GND, VS = 5 V, Tamb = 25°C, f0 = 433.92 MHz and f0 = 315 MHz, unless otherwise specified. The possible operating range refer to different circuit conditions: VS = 4.5 V to 5.5 V, Tamb = -40°C to +85°C 6.76438-Mhz Osc.
PAGE 27
U3745BM Electrical Characteristics All parameters refer to GND, VS = 5 V, Tamb = 25°C, f0 = 433.92 MHz and f0 = 315 MHz, unless otherwise specified. The possible operating range refer to different circuit conditions: VS = 4.5 V to 5.5 V, Tamb = -40°C to +85°C 6.76438-Mhz Osc. (Mode 1) Parameter Programming start pulse (Figure 16, Figure 19) Typ. 4.90625-Mhz Osc. (Mode 0) Typ. Variable Oscillator Test Condition Symbol Min. Max. Min. Max. Min. Max.
PAGE 28
Ordering Information Extended Type Number Package Remarks U3745BM-MFL SO20 Tube U3745BM-MFLG3 SO20 Taped and reeled Package Information 9.15 8.65 Package SO20 Dimensions in mm 12.95 12.70 7.5 7.3 2.35 0.25 0.25 0.10 0.4 10.50 10.20 1.27 11.
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