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Preliminary W24100

128K × 8 CMOS STATIC RAM

Publication Release Date: October 1999

- 1 - Revision A1

GENERAL DESCRIPTION

The W24100 is a normal-speed, very low-power CMOS static RAM organized as 131072

8 bits that

operates on a single 5-volt power supply. This device is manufactured using Winbond's high

performance CMOS technology.

FEATURES

•

Low power consumption:

−

Active: 385 mW (max.)

•

Access time: 70 nS

•

Single 5V power supply

•

Fully static operation

•

All inputs and outputs directly TTL compatible

•

Three-state outputs

•

Battery back-up operation capability

•

Data retention voltage: 2V (min.)

•

Packaged in 32-pin 600 mil DIP, 450 mil SOP,

standard type one TSOP (8 mm

20 mm) and

small type one TSOP (8 mm

13.4 mm)

PIN CONFIGURATIONS

A12

A11

A10

CS1

I/O8

I/O7

I/O6

I/O5

I/O 2

I/O 3

I/O 1

I/O4

A13

A14

A16

A15

CS2

A10

CS1

I/O7

I/O6

I/O5

I/O4

32-pin

TSOP

I/O8

A15

A12

CS2

A13

A11

A14

A16

VSS

I/O3

I/O2

I/O1

32-pin

SOP

BLOCK DIAGRAM

CORE CELL ARRAY

1024 ROWS

128 X 8 COLUMNS

DATA

CNTRL.

CLK

GEN.

A15

I/O CKT.

COLUMN DECODER

CLK GEN.

PRECHARGE CKT.

A13

A0 A11

A10

CS1

CS2

A16

A14

A12

I/O1

I/O8

PIN DESCRIPTION

SYMBOL DESCRIPTION

−

A16

Address Inputs

I/O1

−

I/O8

Data Inputs/Outputs

CS1

, CS2

Chip Select Input

Write Enable Input

Output Enable Input

Power Supply

Ground

NC No Connection

Summary of content (11 pages)

PAGE 1
Preliminary W24100 128K × 8 CMOS STATIC RAM GENERAL DESCRIPTION The W24100 is a normal-speed, very low-power CMOS static RAM organized as 131072 × 8 bits that operates on a single 5-volt power supply. This device is manufactured using Winbond's high performance CMOS technology. FEATURES • • • • • • Low power consumption: − Active: 385 mW (max.
PAGE 2
Preliminary W24100 TRUTH TABLE CS1 H X L L L CS2 X L H H H OE X X WE X X H L X H H L MODE VDD CURRENT I/O1−I/O8 High Z High Z High Z Data Out Data In Not Selected Not Selected Output Disable Read Write ISB, ISB1 ISB, ISB1 IDD IDD IDD DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER Supply Voltage to VSS Potential Input/Output to VSS Potential Allowable Power Dissipation Storage Temperature RATING UNIT -0.5 to +7.0 -0.5 to VDD +0.5 1.
PAGE 3
Preliminary W24100 CAPACITANCE (VDD = 5 V, TA = 25° C, f = 1 MHz) PARAMETER SYM. CONDITIONS MAX. UNIT Input Capacitance CIN VIN = 0V 6 pF Input/Output Capacitance CI/O VOUT = 0V 8 pF Note: These parameters are sampled but not 100% tested. AC CHARACTERISTICS AC Test Conditions PARAMETER CONDITIONS Input Pulse Levels 0V to 3.0V Input Rise and Fall Times 5 nS Input and Output Timing Reference Level 1.
PAGE 4
Preliminary W24100 AC Characteristics, continued (VDD = 5V ±10%; VSS = 0V; TA = 0° C to 70° C) Read Cycle PARAMETER SYM. W24100-70L W24100-70LL MIN. MAX. MIN. MAX.
PAGE 5
Preliminary W24100 TIMING WAVEFORMS Read Cycle 1 (Address Controlled) TRC Address TAA TOH TOH DOUT Read Cycle 2 (Chip Select Controlled) CS1 CS2 TACS TCHZ TCLZ DOUT Read Cycle 3 (Output Enable Controlled) T RC Address TAA OE T OH T AOE TOLZ CS1 CS2 T ACS D OUT T CHZ T OHZ TCLZ -5- Publication Release Date: October 1999 Revision A1
PAGE 6
Preliminary W24100 Timing Waveforms, continued Write Cycle 1 TWC Address T WR OE TCW CS1 CS2 T AW WE T WP TAS TOHZ (1, 4) D OUT T DW TDH D IN Write Cycle 2 ( OE = VIL Fixed) T WC Address TWR TCW CS1 CS2 TAW WE T WP TAS TOH TWHZ (1, 4) D OUT TDW (2) (3) TOW TDH DIN Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2.
PAGE 7
Preliminary W24100 DATA RETENTION CHARACTERISTICS (TA = 0° C to 70° C) PARAMETER SYM. TEST CONDITIONS VDD for Data Retention VDR CS ≥ VDD -0.2V Data Retention Current IDDDR Chip Deselect to Data Retention Time TCDR Operation Recovery Time TR MIN. TYP. MAX. UNIT 2.0 - - V CS ≥ VDD -0.2V, VDD = 3V - - 50 µA See data retention waveform 0 - - nS TRC* - - nS * Read Cycle Time DATA RETENTION WAVEFORM VDD 0.9 V DD > 2V VDR = TCDR CS1 0.9 V DD TR CS > = V DD - 0.
PAGE 8
Preliminary W24100 ORDERING INFORMATION ACCESS TIME (nS) OPERATING CURRENT MAX. (mA) STANDBY CURRENT MAX. (µA) W24100-70L 70 70 100 600 mil DIP W24100-70LL 70 70 50 600 mil DIP W24100S-70L 70 70 100 450 mil SOP W24100S-70LL 70 70 50 450 mil SOP W24100T-70L 70 70 100 Standard type one TSOP W24100T-70LL 70 70 50 Standard type one TSOP W24100Q-70L 70 70 100 Small type one TSOP W24100Q-70LL 70 70 50 Small type one TSOP PART NO. PACKAGE Notes: 1.
PAGE 9
Preliminary W24100 PACKAGE DIMENSIONS 32-pin P-DIP Dimension in inches Symbol A A1 A2 B B1 c D E E1 e1 L D 17 32 E1 16 1 E S c A A2 A1 L Base Plane Seating Plane B e1 eA a B1 Dimension in mm Min. Nom. Max. Min. Nom. Max. 5.33 0.210 0.010 0.25 0.150 0.155 0.160 3.81 3.94 4.06 0.016 0.018 0.022 0.41 0.46 0.56 0.048 0.050 0.054 1.22 1.27 1.37 0.008 0.010 0.014 0.20 0.25 0.36 1.650 1.660 41.91 42.16 0.590 0.600 0.610 14.99 15.24 15.49 0.545 0.550 0.
PAGE 10
Preliminary W24100 Package Dimensions, continued 32-pin Standard Type One TSOP HD Dimension in Inches Dimension in mm Symbol D A c A1 1 M e E 0.10(0.004) b __ 0.002 __ __ 0.006 0.05 __ Max. 1.20 0.15 0.039 0.041 0.95 1.00 1.05 0.008 0.009 0.17 0.20 0.23 c 0.005 0.006 0.007 0.12 0.15 0.17 D 0.720 0.724 0.728 18.30 18.40 18.50 E 0.311 0.315 0.319 HD 0.780 0.787 0.795 19.80 20.00 __ 0.016 __ Y 0.000 A1 θ 1 Y Nom. __ 0.037 A2 L1 Min. 0.047 0.
PAGE 11
Preliminary W24100 VERSION HISTORY VERSION DATE PAGE A1 Oct. 1999 - Headquarters DESCRIPTION Initial Issued Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II, No. 4, Creation Rd. III, 123 Hoi Bun Rd., Kwun Tong, Science-Based Industrial Park, Kowloon, Hong Kong Hsinchu, Taiwan TEL: 852-27513100 TEL: 886-3-5770066 FAX: 852-27552064 FAX: 886-3-5796096 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-27197006 Winbond Electronics North America Corp. Winbond Memory Lab.