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W2465

8K × 8 CMOS STATIC RAM

Publication Release Date: April 1997

- 1 - Revision A8

GENERAL DESCRIPTION

The W2465 is a slow-speed, low-power CMOS static RAM organized as 8192 × 8 bits that operates

on a single 5-volt power supply. This device is manufactured using Winbond's high performance

CMOS technology.

FEATURES

• Low power consumption:

− Active: 250 mW (max.)

− Standby: 100 µW (max.)(LL-version)

250 µW (max.)(L-version)

• Access time: 70/100 nS (max.)

• Single +5V power supply

• Fully static operation

• All inputs and outputs directly TTL compatible

• Three-state outputs

• Battery back-up operation capability

• Data retention voltage: 2V (min.)

• Available packages: 28-pin 600 mil DIP,

330 mil SOP and 300 mil skinny DIP

PIN CONFIGURATION

28NC

A12

9 20

A11

A10

I/O8

I/O7

I/O6

I/O5

13 16

I/O2

I/O3

I/O1

14 15

I/O4

BLOCK DIAGRAM

CS1

A12

I/O1

I/O8

DATA I/O

ARRAY

DECODER

CORE

CS2

CONTROL

PIN DESCRIPTION

SYMBOL DESCRIPTION

A0−A12

Address Inputs

I/O1−I/O8

Data Inputs/Outputs

CS1

, CS2

Chip Select Inputs

Write Enable Input

Output Enable Input

VDD Power Supply

VSS Ground

NC No Connection

Summary of content (10 pages)

PAGE 1
W2465 8K × 8 CMOS STATIC RAM GENERAL DESCRIPTION The W2465 is a slow-speed, low-power CMOS static RAM organized as 8192 × 8 bits that operates on a single 5-volt power supply. This device is manufactured using Winbond's high performance CMOS technology. FEATURES • • • • Low power consumption: − Active: 250 mW (max.) − Standby: 100 µW (max.)(LL-version) 250 µW (max.)(L-version) Access time: 70/100 nS (max.
PAGE 2
W2465 TRUTH TABLE CS1 H X L L L CS2 X L H H H OE X X H L X WE X X H H L MODE Not Selected Not Selected Output Disable Read Write VDD CURRENT ISB, ISB1 ISB, ISB1 IDD IDD IDD I/O1−I/O8 High Z High Z High Z Data Out Data In DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER Supply Voltage to VSS Potential Input/Output to VSS Potential Allowable Power Dissipation Storage Temperature Operating Temperature RATING -0.5 to +7.0 -0.5 to VDD +0.5 1.
PAGE 3
W2465 CAPACITANCE (VDD = 5V, TA = 25° C, f = 1 MHz) PARAMETER SYM. CONDITIONS MAX. UNIT Input Capacitance CIN VIN = 0V 6 pF Input/Output Capacitance CI/O VOUT = 0V 8 pF Note: These parameters are sampled but not 100% tested. AC CHARACTERISTICS AC Test Conditions PARAMETER CONDITIONS Input Pulse Levels 0.6V to 2.4V Input Rise and Fall Times 5 nS Input and Output Timing Reference Level 1.
PAGE 4
W2465 AC Characteristics, continued (VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C) Read Cycle PARAMETER SYM. W2465-70 W2465-10 MIN. MAX. MIN. MAX.
PAGE 5
W2465 TIMING WAVEFORMS Read Cycle 1 (Address Controlled) TRC Address TOH TAA TOH D OUT Read Cycle 2 (Chip Select Controlled) CS1 TACS1 TCHZ1 TACS2 CS2 TCHZ2 TCLZ1 D OUT TCLZ2 Read Cycle 3 (Output Enable Controlled) TRC Address TAA OE TAOE TOLZ TOH CS1 TACS1 TCLZ1 CS2 TCHZ1 TACS2 TCHZ2 TOHZ TCLZ2 DOUT -5- Publication Release Date: April 1997 Revision A8
PAGE 6
W2465 Timing Waveforms, continued Write Cycle 1 TWC Address TWR1 OE TCW1 CS1 CS2 TCW2 TAW WE TWR2 TWP TAS TOHZ (1, 4) D OUT TDW TDH D IN Write Cycle 2 (OE = VIL Fixed) TWC Address TWR1 TCW1 CS1 TCW2 CS2 TAW WE TWR2 TWP TAS TOH TWHZ(1, 4) TOW (2) (3) DOUT TDW TDH D IN Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2.
PAGE 7
W2465 DATA RETENTION CHARACTERISTICS (TA = 0 to 70° C) PARAMETER VDD for Data Retention SYM. VDR TEST CONDITIONS Data Retention Current IDDDR CS1 ≥ VDD -0.2V, or CS2 ≤ 0.2V VDD = 3V Chip Deselect to Data Retention Time Operation Recovery Time TCDR See data retention waveforms CS1 ≥ VDD -0.2V, or CS2 ≤ 0.2V LL L TR MIN. 2.0 TYP. - MAX. - UNIT V - - 10 µA - - 20 0 - - µA nS TRC* - - nS TRC* = Read Cycle Time DATA RETENTION WAVEFORMS DATA RETENTION MODE VDD 4.
PAGE 8
W2465 BONDING PAD DIAGRAM 5 4 3 2 1 A4 A5 A6 A7 A12 26 25 24 23 22 WE CS2 A8 A9 A11 27S-2 27S-1 VDD VDD 21 6 A3 OE Y X 7 13S-2 20 A2 VSS A10 13S-1 8 9 10 11 12 A1 A0 O0 O1 O2 14 15 16 17 18 19 03 O4 O5 O6 O7 CS1 VSS PAD NO. X Y 1 2 3 4 5 6 7 8 9 10 11 12 13S-1 13S-2 14 15 16 17 18 -226.95 -350.95 -484.10 -608.10 -739.75 -741.75 -741.75 -741.75 -610.60 -481.50 -343.80 -206.10 -73.00 -8.35 60.10 193.30 332.40 465.60 603.30 1526.15 1526.15 1526.
PAGE 9
W2465 PACKAGE DIMENSIONS 28-pin P-DIP Symbol A A1 A2 B B1 c D E E1 e1 L D 28 15 a E1 eA Dimension in Inches 14 E S c A A2 A1 L Base Plane Seating Plane B e1 eA a B1 5.33 0.210 0.010 0.25 0.150 0.155 0.160 3.81 3.94 4.06 0.016 0.018 0.022 0.41 0.46 0.56 0.058 0.060 0.064 1.47 1.52 1.63 0.008 0.010 0.014 0.20 0.25 0.36 1.460 1.470 37.08 37.34 0.590 0.600 0.610 14.99 15.24 15.49 0.540 0.545 0.550 13.72 13.84 13.97 0.100 0.110 2.29 2.54 2.
PAGE 10
W2465 Package Dimensions, continued 28-pin SO Wide Body Symbol 28 A A1 A2 b c D E e HE L LE S y θ 15 e1 E HE L Detail F 14 1 b Dimension in Inches Min. Nom. Max. Dimension in mm Min. Nom. Max. 2.85 0.112 0.004 0.10 0.093 0.098 0.103 2.36 2.49 2.62 0.014 0.016 0.020 0.36 0.41 0.51 0.008 0.010 0.014 0.20 0.25 0.36 0.713 0.733 18.11 18.62 0.326 0.331 0.336 8.28 8.41 8.53 0.044 0.050 0.056 1.12 1.27 1.42 0.453 0.465 0.477 11.51 11.81 12.12 0.028 0.