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Preliminary W24L11

128K × 8 CMOS STATIC RAM

Publication Release Date: October 1999

- 1 - Revision A1

GENERAL DESCRIPTION

The W24L11 is a normal-speed, very low-power CMOS static RAM organized as 131072

8 bits that

operates on a wide voltage range from 3.0V to 3.6V power supply. This device is manufactured using

Winbond's high performance CMOS technology.

FEATURES

•

Low power consumption:

−

Active: 144 mW (max.)

•

Access time: 70 nS

•

Single 3.3V power supply

•

Fully static operation

•

All inputs and outputs directly TTL compatible

•

Three-state outputs

•

Battery back-up operation capability

•

Data retention voltage: 2V (min.)

•

Packaged in 600 mil DIP, 450 mil SOP,

standard type one, TSOP (8 mm

20 mm) ,

small type one and TSOP (8 mm

13.4 mm)

PIN CONFIGURATIONS BLOCK DIAGRAM

A12

A11

A10

CS1

I/O8

I/O7

I/O6

I/O5

I/O2

I/O3

I/O1

I/O4

A13

A14

A16

A15

CS2

32-pin

I/O8

A15

A12

CS2

A13

A11

A14

A16

PRECHARGE CKT.

A13 A1

A10

CS1

A16

A14

I/O1

PIN DESCRIPTION

SYMBOL DESCRIPTION

A0−A16

Address Inputs

I/O1

−

I/O8

Data Inputs/Outputs

CS1

, CS2

Chip Select Input

Write Enable Input

Output Enable Input

Power Supply

Ground

NC No Connection

Summary of content (11 pages)

PAGE 1
Preliminary W24L11 128K × 8 CMOS STATIC RAM GENERAL DESCRIPTION The W24L11 is a normal-speed, very low-power CMOS static RAM organized as 131072 × 8 bits that operates on a wide voltage range from 3.0V to 3.6V power supply. This device is manufactured using Winbond's high performance CMOS technology. FEATURES • • • • • Low power consumption: − Active: 144 mW (max.) Access time: 70 nS Single 3.
PAGE 2
Preliminary W24L11 TRUTH TABLE CS1 CS2 OE WE MODE VDD CURRENT H X X X Not Selected High Z ISB, ISB1 X L X X Not Selected High Z ISB, ISB1 L H H H Output Disable High Z IDD L H L H Read Data Out IDD L H X L Write Data In IDD I/O1−I/O8 DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER RATING UNIT -0.5 to +4.6 V Input/Output to VSS Potential -0.5 to VDD +0.5 V Allowable Power Dissipation 1.
PAGE 3
Preliminary W24L11 Operating Characteristics, continued PARAMETER Standby Power Supply Current SYM. TEST CONDITIONS ISB CS1 = VIH (min.) or CS2 = VIL (max.) Cycle = min. Duty = 100% ISB1 CS1 ≥ VDD -0.2V or CS2 ≤ 0.2V MIN. MAX. UNIT - 1 mA LL - 50 µA L - 100 Note: Typical parameter is measured under ambient temperature TA = 25° C and VDD = 3.3V CAPACITANCE (VDD = 3.3 V, TA = 25° C, f = 1 MHz) PARAMETER SYM. CONDITIONS MAX.
PAGE 4
Preliminary W24L11 AC Characteristics, continued (VDD = 3.0V to 3.6 V; VSS = 0V; TA (°C) = 0 to 70) Read Cycle PARAMETER SYMBOL W24L11-70L/LL MIN. MAX.
PAGE 5
Preliminary W24L11 TIMING WAVEFORMS Read Cycle 1 (Address Controlled) TRC Address TOH TAA TOH DOUT Read Cycle 2 (Chip Select Controlled) CS1 CS2 TACS TCHZ TCLZ D OUT Read Cycle 3 (Output Enable Controlled) T RC Address TAA OE TOH TAOE TOLZ CS1 CS2 TACS DOUT TCHZ TOHZ TCLZ -5- Publication Release Date: October 1999 Revision A1
PAGE 6
Preliminary W24L11 Timing Waveforms, continued Write Cycle 1 TWC Address TWR OE TCW CS1 CS2 TAW WE T WP TAS TOHZ (1, 4) DOUT TDW TDH DIN Write Cycle 2 ( OE = VIL Fixed) T WC Address TWR TCW CS1 CS2 TAW WE TOH T WP TAS TWHZ (1, 4) D OUT TDW (2) (3) TOW TDH DIN Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2.
PAGE 7
Preliminary W24L11 DATA RETENTION CHARACTERISTICS (TA (°C) = 0 to 70) PARAMETER VDD for Data Retention SYM. TEST CONDITIONS CS1 ≥ VDD -0.2V or VDR MIN. TYP. MAX. UNIT 2.0 - - V - - 50 µA 0 - - nS TRC* - - nS CS2 ≤ 0.2V Data Retention Current CS1 ≥ VDD -0.2V or IDDDR CS2 ≤ 0.2V, VDD = 3V Chip Deselect to Data Retention Time TCDR Operation Recovery Time TR See data retention waveform * Read Cycle Time DATA RETENTION WAVEFORM VDD 0.9VDD VDR > = 2V TCDR CS1 CS2 0.
PAGE 8
Preliminary W24L11 ORDERING INFORMATION ACCESS TIME (nS) OPERATING VOLTAGE (V) OPERATING TEMPERATURE (°C) STANDBY CURRENT MAX.(µ A) W24L11-70LL 70 3.0V to 3.6V 0 to 70 50 600 mil DIP W24L11S-70LL 70 3.0V to 3.6V 0 to 70 50 450 mil SOP W24L11T-70LL 70 3.0V to 3.6V 0 to 70 50 Standard type one TSOP W24L11Q-70LL 70 3.0V to 3.6V 0 to 70 50 Small type one TSOP W24L11-70L 70 3.0V to 3.6V 0 to 70 100 600 mil DIP W24L11S-70L 70 3.0V to 3.
PAGE 9
Preliminary W24L11 PACKAGE DIMENSIONS 32-pin P-DIP Dimension in inches Symbol A A1 A2 B B1 c D E E1 e1 L D 17 32 E1 16 1 E S c A A2 A1 L Base Plane Seating Plane B e1 eA a B1 Dimension in mm Min. Nom. Max. Min. Nom. Max. 5.33 0.210 0.010 0.25 0.150 0.155 0.160 3.81 3.94 4.06 0.016 0.018 0.022 0.41 0.46 0.56 0.048 0.050 0.054 1.22 1.27 1.37 0.008 0.010 0.014 0.20 0.25 0.36 1.650 1.660 41.91 42.16 0.600 0.610 14.99 15.24 15.49 0.545 0.550 0.555 13.
PAGE 10
Preliminary W24L11 Package Dimensions, continued 32-pin Standard Type One TSOP HD Dimension in Inches Dimension in mm Symbol D A c A1 1 M e E 0.10(0.004) b __ __ Min. Nom. __ __ Max. 0.006 0.05 1.20 __ 0.15 A2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.008 0.009 0.17 0.20 0.23 c 0.005 0.006 0.007 0.12 0.15 0.17 D 0.720 0.724 0.728 18.30 18.40 18.50 E 0.311 0.315 0.319 HD 0.780 0.787 0.795 19.80 20.00 __ L A 0.016 __ 0.024 0.40 __ __ 0.
PAGE 11
Preliminary W24L11 VERSION HISTORY VERSION DATE PAGE A1 Oct. 1999 - Headquarters DESCRIPTION Initial Issued Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II, No. 4, Creation Rd. III, 123 Hoi Bun Rd., Kwun Tong, Science-Based Industrial Park, Kowloon, Hong Kong Hsinchu, Taiwan TEL: 852-27513100 TEL: 886-3-5770066 FAX: 852-27552064 FAX: 886-3-5796096 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-27197006 Winbond Electronics North America Corp. Winbond Memory Lab.