Manual

W78C54
Publication Release Date: December 1997
- 13 - Revision A2
DC Characteristics, continued
PARAMETER SYM. SPECIFICATION UNIT TEST CONDITIONS
MIN. MAX.
Input High Voltage
P0, P1, P2, P3, P4, EA
VIH1 2.4 VDD +0.2 V VDD = 5.5V
Input High Voltage
RST
VIH2 3.5 VDD +0.2 V VDD = 5.5V
Input High Voltage
XTAL1 [*4]
VIH3 3.5 VDD +0.2 V VDD = 5.5V
Output Low Voltage
P1, P2, P3, P4
VOL1 - 0.45 V VDD = 4.5V
I
OL = +2 mA
Output Low Voltage
P0, ALE, PSEN [*3]
VOL2 - 0.45 V VDD = 4.5V
I
OL = +4 mA
Sink Current
P1, P2, P3, P4
ISK1 48mAVDD = 4.5V
Vs = 0.45V
Sink Current
P0, ALE, PSEN
ISK2 10 14 mA VDD = 4.5V
Vs = 0.45V
Output High Voltage
P1, P2, P3, P4
VOH1 2.4 - V VDD = 4.5V
I
OH = -100 µA
Output High Voltage
P0, ALE, PSEN [*3]
VOH2 2.4 - V VDD = 4.5V
I
OH = -400 µA
Source Current
P1, P2, P3, P4
ISR1 -120 -180
µA
VDD = 4.5V
Vs = 2.4V
Source Current
P0, ALE, PSEN
ISR2 -10 -14 mA VDD = 4.5V
Vs = 2.4V
Notes:
*1. RST pin is a Schmitt trigger input. RST has internal pull-low resistors of about 30 K.
*3. P0, ALE and /PSEN are tested in the external access mode.
*4. XTAL1 is a CMOS input.
*5. Pins of P1, P2, P3, P4 can source a transition current when they are being externally driven from 1 to 0. The transition
current reaches its maximum value when V
IN approximates to 2V.
AC CHARACTERISTICS
The AC specifications are a function of the particular process used to manufacture the part, the
ratings of the I/O buffers, the capacitive load, and the internal routing capacitance. Most of the
specifications can be expressed in terms of multiple input clock periods (T
CP), and actual parts will
usually experience less than a ±20 nS variation. The numbers below represent the performance
expected from a 0.8 micron CMOS process when using 2 and 4 mA output buffers.