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W78C801

8-BIT MICROCONTROLLER

Publication Release Date: February 1999

- 1 - Revision A3

GENERAL DESCRIPTION

The W78C801 is an 8-bit microcontroller which can accommodate a wide frequency range with low

power consumption. The instruction set for the W78C801 is fully compatible with the standard 8051.

The W78C801 contains an 4K bytes Mask ROM; a 256 bytes RAM; four 8-bit bi-directional and bit-

addressable I/O ports; an additional 6-bit I/O port P4; two 16-bit timer/counters; a hardware watchdog

timer. These peripherals are supported by a twelve sources two-level interrupt capability. The

W78C801 does not contain serial port.

The W78C801 microcontroller has two power reduction modes, idle mode and power-down mode,

both of which are software selectable. The idle mode turns off the processor clock but allows for

continued peripheral operation. The power-down mode stops the crystal oscillator for minimum power

consumption. The external clock can be stopped at any time and in any state without affecting the

processor.

FEATURES

• Fully static design 8-bit CMOS microcontroller

• DC-40 MHz operation

• 256 bytes of on-chip scratchpad RAM

• 4 KB Mask-ROM

• 64 KB program memory address space

• 64 KB data memory address space

• Four 8-bit bi-directional ports

• Two 16-bit timer/counters

• Watchdog Timer

• Direct LED drive outputs

•

Twelve sources, two-level interrupt capability

• Wake-up via external interrupts at Port 1

• EMI reduction mode

•

Built-in power management

• Code protection mechanism

• Packages:

− DIP 40: W78C801-24/40

− PLCC 44: W78C801P-24/40

− PQFP 44: W78C801F-24/40

Summary of content (18 pages)

PAGE 1
W78C801 8-BIT MICROCONTROLLER GENERAL DESCRIPTION The W78C801 is an 8-bit microcontroller which can accommodate a wide frequency range with low power consumption. The instruction set for the W78C801 is fully compatible with the standard 8051. The W78C801 contains an 4K bytes Mask ROM; a 256 bytes RAM; four 8-bit bi-directional and bitaddressable I/O ports; an additional 6-bit I/O port P4; two 16-bit timer/counters; a hardware watchdog timer.
PAGE 2
W78C801 PIN CONFIGURATIONS 40-Pin DIP (W78C801) INT2, P1.0 INT3, P1.1 INT4,P1.2 INT5,P1.3 INT6,P1.4 INT7,P1.5 INT8,P1.6 INT9,P1.7 RST P3.0 P3.1 INT0, P3.2 INT1, P3.3 T0, P3.4 T1, P3.5 1 2 40 39 3 4 38 37 36 5 6 7 8 9 10 11 12 13 WR, P3.6 14 15 16 RD, P3.7 XTAL2 XTAL1 17 18 19 VSS 20 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VDD P0.0, AD0 P0.1, AD1 P0.2, AD2 P0.3, AD3 P0.4, AD4 P0.5, AD5 P0.6, AD6 P0.7, AD7 EA ALE,P4.5 PSEN,P4.6 P2.7, A15 P2.6, A14 P2.5, A13 P2.4, A12 P2.3, A11 P2.2, A10 P2.
PAGE 3
W78C801 PIN DESCRIPTION SYMBOL DESCRIPTIONS EA EXTERNAL ACCESS ENABLE: This pin forces the processor to execute out of external ROM. It should be kept high to access internal ROM. The ROM address and data will not be presented on the bus if EA pin is high and the program counter is within on-chip ROM area. Otherwise they will be presented on the bus. PSEN PROGRAM STORE ENABLE: PSEN enables the external ROM data onto the Port 0 address/ data bus during fetch and MOVC operations.
PAGE 4
W78C801 BLOCK DIAGRAM P1.0 Port 1 Port 1 Latch P1.7 INT2~9 ACC B P0.0 Port 0 Interrupt T1 Latch T2 Port 0 P0.7 DPTR Timer 0 Stack Pointer PSW ALU Temp Reg. Timer 1 PC Incrementor Addr. Reg. P3.0 Port 3 Port 3 SFR RAM Address Instruction Decoder & Sequencer Latch P3.7 256 bytes RAM & SFR P2.0 Port 2 Latch Bus & Clock Controller P2.7 Port 4 Latch P4.0 Port 2 Watchdog Port 4 Timer Oscillator P4.
PAGE 5
W78C801 3 (P3.4 to P3.7) can be selected to serve the direct LED displays drive outputs by setting the HDx bit in the PO register. When the HDx bit is set, the corresponding pin P3.x can sink about 20mA current for driving LED display directly. After reset, the POR register is cleared and the pins of Ports 0 and 3 are the same as those of the standard 80C31. The POR register is shown below.
PAGE 6
W78C801 Interrupt Enable Register 0 Bit: 7 6 5 4 3 2 1 0 EA - - - ET1 EX1 ET0 EX0 Mnemonic: IE EA : ET1: EX1: ET0: EX0: Address: A8H Global enable. Enable/disable all interrupts.
PAGE 7
W78C801 Interrupt Priority Register 1 Bit: 7 6 5 4 3 2 1 0 PX9 PX8 PX7 PX6 PX5 PX4 PX3 PX2 Mnemonic: IP1 PX9: PX8: PX7: PX6: PX5: PX4: PX3: PX2: Address: F8h This bit defines the External interrupt 9 priority. PX9 = 1 sets it to higher priority level. This bit defines the External interrupt 8 priority. PX8 = 1 sets it to higher priority level. This bit defines the External interrupt 7 priority. PX7 = 1 sets it to higher priority level. This bit defines the External interrupt 6 priority.
PAGE 8
W78C801 Table.
PAGE 9
W78C801 PS2 PS1 PS0 0 0 0 0 1 0 0 0 1 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 PRESCALER SELECT 2 4 8 16 32 64 128 256 The time-out period is obtained using the following formula: 1 × 214 × PRESCALER × 1000 × 12 mS OSC Before Watchdog time-out occurs, the program must clear the 14-bit timer by writing 1 to WDTC.6 (CLRW). After 1 is written to this bit, the 14-bit timer , prescaler and this bit will be reset on the next instruction cycle. The Watchdog timer is cleared on reset.
PAGE 10
W78C801 Clock The W78C801 is designed to be used with either a crystal oscillator or an external clock. Internally, the clock is divided by two before it is used. This makes the W78C801 relatively insensitive to duty cycle variations in the clock. The W78C801 incorporates a built-in crystal oscillator. To make the oscillator work, a crystal must be connected across pins XTAL1 and XTAL2. In addition, a load capacitor must be connected from each pin to ground.
PAGE 11
W78C801 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL MIN. MAX. UNIT VDD−VSS -0.3 +6.0 V Input Voltage VIN VSS -0.3 VDD +0.3 V Operating Temperature TA 0 70 °C Storage Temperature TST -55 +150 °C DC Power Supply Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. DC CHARACTERISTICS Vss = 0V ; TA = 25° C; unless otherwise specified. PARAMETER SYM. SPECIFICATION MIN. MAX.
PAGE 12
W78C801 DC Characteristics, continued PARAMETER Input High Voltage SYM. SPECIFICATION TEST CONDITIONS MIN. MAX. UNIT VIH1 2.4 VDD +0.2 V VDD = 5.5V VIH2 3.5 VDD +0.2 V VDD = 5.5V VIH3 3.5 VDD +0.2 V VDD = 5.5V - 0.45 V VDD = 4.5V P1, P2, P3, P4 Input High Voltage RST Input High Voltage [*4] XTAL1 Output Output Low Voltage VOL1 P1, P2, P3, P4 IOL = +2 mA Output Low Voltage P0, ALE, PSEN [*4] VOL2 Sink Current Isk1 [5] P1, P2, P3 - 0.
PAGE 13
W78C801 AC CHARACTERISTICS Clock Input Waveform XTAL1 T CH TCL F OP, PARAMETER TCP SYMBOL MIN. TYP. MAX. UNIT NOTES Operating Speed FOP 0 - 16 MHz 1 Clock Period TCP 25 - - nS 2 Clock High TCH 10 - - nS 3 Clock Low TCL 10 - - nS 3 Notes: 1. The clock may be stopped indefinitely in either state. 2. The TCP specification is used as a reference in other specifications. 3. There are no duty cycle requirements on the XTAL1 input. Program Fetch Cycle PARAMETER SYMBOL MIN.
PAGE 14
W78C801 Data Read Cycle PARAMETER SYMBOL MIN. TYP. MAX. UNIT NOTES ALE Low to RD Low TDAR 3 TCP -∆ - 3 TCP +∆ nS 1, 2 RD Low to Data Valid TDDA - - 4 TCP nS 1 Data Hold from RD High TDDH 0 - 2 TCP nS Data Float from RD High TDDZ 0 - 2 TCP nS RD Pulse Width TDRD 6 TCP -∆ 6 TCP - nS Notes: 1. Data memory access time is 8 TCP. 2. "∆" (due to buffer driving delay and wire loading) is 20 nS. Data Write Cycle PARAMETER SYMBOL MIN. TYP. MAX.
PAGE 15
W78C801 TIMING WAVEFORMS Program Fetch Cycle S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6 XTAL1 TALW ALE TAPL PSEN TPSW TAAS PORT 2 TPDA TAAH TPDH, TPDZ PORT 0 A0-A7 Code Data A0-A7 A0-A7 Code Data A0-A7 Data Read Cycle S4 S5 S6 S1 S2 S3 S4 S5 S6 S1 S2 S3 XTAL1 ALE PSEN PORT 2 A8-A15 DATA A0-A7 PORT 0 T DAR T DDA T DDH, T DDZ RD T DRD - 15 - Publication Release Date: February 1999 Revision A3
PAGE 16
W78C801 Timing Waveforms, continued Data Write Cycle S4 S5 S6 S1 S2 S3 S4 S5 S6 S1 S2 XTAL1 ALE PSEN A8-A15 PORT 2 PORT 0 A0-A7 DATA OUT T DWD TDAD WR T DWR T DAW Port Access Cycle S5 S6 S1 XTAL1 ALE TPDS T PDA T PDH DATA OUT PORT INPUT SAMPLE - 16 - S3
PAGE 17
W78C801 PACKAGE DIMENSIONS 40-pin DIP Dimension in inch Dimension in mm Min. Nom. Max. Min. Nom. Max. Symbol D 40 21 E1 0.010 0.150 0.155 0.160 3.81 3.937 0.016 0.018 0.022 0.406 0.457 0.559 0.048 0.050 0.054 1.219 1.27 1.372 0.590 0.203 4.064 0.356 0.010 0.014 2.055 2.070 52.20 52.58 0.600 0.610 14.986 15.24 15.494 0.254 0.540 0.545 0.550 13.72 13.84 13.97 0.090 0.100 0.110 2.286 2.54 2.794 0.120 0.130 0.140 3.048 3.302 3.556 15 0 0.670 16.00 16.
PAGE 18
W78C801 Package Dimensions, continued 44-pin PQFP HD Symbol 34 A A1 A2 b c D E e HD HE L L1 y θ 33 1 E HE 11 12 e Dimension in mm Dimension in inch D 44 b 22 Min. Nom. Max. Min. Nom. Max. --- --- --- --- 0.002 0.01 0.02 0.05 0.25 0.5 0.075 0.081 0.087 1.90 2.05 2.20 0.01 0.014 0.018 0.25 0.35 0.45 0.004 0.006 0.010 0.101 0.152 0.254 0.390 0.394 0.398 9.9 10.00 10.1 0.390 0.394 0.398 9.9 10.00 10.1 0.025 0.031 0.036 0.635 0.80 0.952 0.510 0.