Instruction Manual

W90P710CD/W90P710CDG

Publication Release Date: September 19, 2006

- 149 - Revision B2

31 30 29 28 27 26 25 24

Reserved

23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8

MRPCC

7 6 5 4 3 2 1 0

MRPCC

BITS DESCRIPTIONS

[31:16] Reserved -

[15:0] MRPCC

The MAC Receive Pause Current Count shows the current value of

that down count timer. If a new PAUSE control frame is received

before the timer count down to zero, the new operand of the PAUSE

control frame will be stored into the down count timer and the timer

starts count down from the new value.

MAC Remote Pause Count Register (MREPC)

The EMC of W90P710 supports the PAUSE control frame transmission. After the PAUSE control

frame is transmitted out completely, a timer starts to count down from the value of operand of the

transmitted PAUSE control frame. The MREPC shows the current value of this down count timer. The

MREPC is read only and write to this register has no effect.

MREPC 0xFFF0_30C4 R MAC Remote Pause Count Register 0x0000_0000

31 30 29 28 27 26 25 24

Reserved

23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8

MREPC

7 6 5 4 3 2 1 0

MREPC