Instruction Manual
W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 155 - Revision B2
BITS DESCRIPTIONS
[31:24] TX_FSM TxDMA FSM
[23:22] Reserved -
[21:16] TXBuf_FSM Transmit Buffer FSM
[15:12] TXFetch_FSM Transmit Descriptor Fetch FSM
[11:8] TXClose_FSM Transmit Descriptor Close FSM
[7:5] Reserved -
[4:0] TFF_FSM TxFIFO Controller FSM
Finite State Machine Register 0 (FSM0)
The FSM0 shows the current value of the FSM (Finite State Machine) of the function module in EMC.
The FSM0 is read only and write to it has no effect. The FSM0 is used only for debug.
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
FSM0 0xFFF0_3208 R Finite State Machine Register 0 0x0001_0101
31 30 29 28 27 26 25 24
Reserved TXMAC_FSM
23 22 21 20 19 18 17 16
TXMAC_FSM
15 14 13 12 11 10 9 8
Reserved TXDefer_FSM
7 6 5 4 3 2 1 0
STA_FSM
BITS DESCRIPTIONS
[31:26] Reserved
-
[25:16] TXMAC_FSM TxMAC FSM
[15:14] Reserved
-
[13:8] TXDefer_FSM Transmit Defer Process FSM
[7:0] STA_FSM MII Management I/F FSM










