Instruction Manual
W90P710CD/W90P710CDG
- 216 -
Continued.
BITS DESCRIPTIONS
[2] EPA_ALT_IC Endpoint A alternate setting interrupt clear
[1] EPA_TK_IC Endpoint A token input interrupt clear
[0] EPA_STL_IC Endpoint A stall interrupt clear
USB Endpoint A Interrupt Status Register (EPA_IS)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
EPA_IS 0xFFF06058 R
USB endpoint A interrupt status
register
0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
Reserved EPA_CF_IS
EPA_BUS_ERR_IS EPA_DMA_IS EPA_ALT_IS EPA_TK_IS EPA_STL_IS
BITS DESCRIPTIONS
[31:6] Reserved
[5] EPA_CF_IS Endpoint A clear feature interrupt status
[4] EPA_BUS_ERR_IS Endpoint A system bus error interrupt status
[3] EPA_DMA_IS Endpoint A DMA transfer complete interrupt status
[2] EPA_ALT_IS Endpoint A alternative setting interrupt status
[1] EPA_TK_IS Endpoint A token interrupt status
[0] EPA_STL_IS Endpoint A stall interrupt status










