Instruction Manual

W90P710CD/W90P710CDG
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BITS DESCRIPTIONS
[31:0] OSDLUTENTRY3
Theses bits define address of Lookup Table SRAM when OSD
pixel data is
00 = OSDLUTENTRY3[7:0]
01 = OSDLUTENTRY3[15:8]
10 = OSDLUTENTRY3[23:16]
11 = OSDLUTENTRY3[31:24]
OSD Lookup Table Entry Index 4 Register (OSDLUTENTRY4)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
OSDLUTENTRY4 0xFFF0_806C R/W OSD lookup table entry index 4 0x0000_0000
31 30 29 28 27 26 25 24
OSDLUTENTRY4[31:24]
23 22 21 20 19 18 17 16
OSDLUTENTRY4[23:16]
15 14 13 12 11 10 9 8
OSDLUTENTRY4[15:8]
7 6 5 4 3 2 1 0
OSDLUTENTRY4[7:0]
BITS DESCRIPTIONS
[31:0] OSDLUTENTRY4
Theses bits define address of Lookup Table SRAM when OSD
pixel data is
00 = OSDLUTENTRY4[7:0]
01 = OSDLUTENTRY4[15:8]
10 = OSDLUTENTRY4[23:16]
11 = OSDLUTENTRY4[31:24]
Dithering Pattern 1 Register (DITHP1)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
DITHP1 0xFFF0_8070 R/W Gray level dithered data duty pattern 1 0x0101_0001