Instruction Manual

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 301 - Revision B2
31 30 29 28 27 26 25 24
PPL[15:8]
23 22 21 20 19 18 17 16
PPL[7:0]
15 14 13 12 11 10 9 8
LPP[15:8]
7 6 5 4 3 2 1 0
LPP[7:0]
BITS DESCRIPTIONS
[31:16] PPL
Pixel Per-Line
The PPL bit field specifies the number of pixels in each line or row of
screen.
[15:0] LPP
Lines Per-Panel
The LPP bit field specifies the number of active lines per screen.
LCD Timing Control 3 Register (LCDTCON3)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
LCDTCON3 0xFFF0_80B8 R/W LCD Timing Control Register 3 0x0000_0000
31 30 29 28 27 26 25 24
Reserved VSPW[9:4]
23 22 21 20 19 18 17 16
VSPW[3:0] VBPD[9:6]
15 14 13 12 11 10 9 8
VBPD[5:0] VFPD[9:8]
7 6 5 4 3 2 1 0
VFPD[7:0]