Instruction Manual

W90P710CD/W90P710CDG
- 318 -
BITS DESCRIPTIONS
[31:0]
AUDIO_PDSTB[31:0]
32-bit play destination base address
The AUDIO_PDSTB[31:0] bits is read/write.
DMA destination end address (ACTL_PDST_LENGTH)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
ACTL_PDST_LENGTH
0xFFF0_901C R/W DMA play destination address length 0x0000_0000
The value in ACTL_PDST_LENGTH register is the play destination address length of DMA, and the
register could only be changed by CPU.
31 30 29 28 27 26 25 24
AUDIO_PDSTB[31:24]
23 22 21 20 19 18 17 16
AUDIO_PDSTB[23:16]
15 14 13 12 11 10 9 8
AUDIO_PDSTB[15:8]
7 6 5 4 3 2 1 0
AUDIO_PDSTB[7:0]
31 30 29 28 27 26 25 24
AUDIO_PDST_L[31:24]
23 22 21 20 19 18 17 16
AUDIO_PDST_L[23:16]
15 14 13 12 11 10 9 8
AUDIO_PDST_L[15:8]
7 6 5 4 3 2 1 0
AUDIO_PDST_L[7:0]