Instruction Manual

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 367 - Revision B2
BITS DESCRIPTIONS
[31:24]
Reserved Reserved
[23:0]
TIC
Timer Initial Count
This is a 24-bit value representing the initial count. Timer will reload
this value whenever the counter is decremented to zero.
NOTE1: Never write 0x0 in TIC, or the core will run into unknown
state.
NOTE2: No matter CEN is 0 or 1, whenever software write a new
value into this register, TIMER will restart counting using this new
value and abort previous count.
Timer Data Register 0/1 (TDR0/1)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
TDR0
0xFFF8_10010 R Timer Data Register 0 0x0000_0000
TDR1
0xFFF8_10014 R Timer Data Register 1 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
TDR [23:16]
15 14 13 12 11 10 9 8
TDR [15:8]
7 6 5 4 3 2 1 0
TDR [7:0]
BITS DESCRIPTIONS
[31:24]
Reserved Reserved
[23:0]
TDR
Timer Data Register
The current count is registered in this 24-bit value.
NOTE: Software can read a correct current value on this register only
when CEN = 0, or the value represents here could not be a correct
one.