Instruction Manual

W90P710CD/W90P710CDG
- 386 -
BITS DESCRIPTIONS
[31:1]
SSCx
When the W90P710 is under debugging or verification
, software can
activate any interrupt channel by setting the corresponding bit in this
register. This feature is useful in hardware verification
or software
debugging.
SSCx: Source Set Command
0 = No effect.
1 = Activates the corresponding interrupt channel
[0]
Reserved
Reserved
AIC Source Clear Command Register (AIC_SCCR)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
AIC_SCCR
0xFFF8_212C
W
Source Clear Command Register Undefined
31 30 29 28 27 26 25 24
SCC31 SCC30 SCC29 SCC28 SCC27 SCC26 SCC25 SCC24
23 22 21 20 19 18 17 16
SCC23 SCC22 SCC21 SCC20 SCC19 SCC18 SCC17 SCC16
15 14 13 12 11 10 9 8
SCC15 SCC14 SCC13 SCC12 SCC11 SCC10 SCC9 SCC8
7 6 5 4 3 2 1 0
SCC7 SCC6 SCC5 SCC4 SCC3 SCC2 SCC1 RESERVE
D
BITS DESCRIPTIONS
[31:1]
SCCx
When the W90P710 is under debugging or verification
, software can
deactivate any interrupt channel by setting the corresponding bit in this
register. This feature is useful in hardware verification
or software
debugging.
SCCx: Source Clear Command
0 = No effect.
1 = Deactivates the corresponding interrupt channels
[0]
Reserved
Reserved