Instruction Manual

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 399 - Revision B2
BITS DESCRIPTION
[31:26] RESERVED
-
[25:16]
PUPEN1
GPIO51 ~ GPIO42 port pins internal pull-up resister enable
This is a 10-bit registers, set corresponding bit to “1” will enable
pull up resister in IO pin.
1 = enable
0 = disable
After power on the resisters are disabled.
[15:10] RESERVED
-
[9:0]
OMDEN1
PIO51 ~ GPIO42 output mode enable
1 = enable
0 = disable
NOTE: Output mode enable bits are valid only when bit
PT1CFG9-0 is configured as general purpose I/O mode.
Each port pin can be enabled individually by setting the
corresponding control bit.
GPIO Port1 Data Output Register (GPIO_DATAOUT1)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
GPIO_DATAOUT1 0xFFF8_3018 R/W GPIO port1 data output register 0x0000_0000
31 30 29 28 27 26 25 24
RESERVED
23 22 21 20 19 18 17 16
RESERVED
15 14 13 12 11 10 9 8
RESERVED DATAOUT1[9:8]
7 6 5 4 3 2 1 0
DATAOUT1[7:0]
BITS DESCRIPTION
[31:10] RESERVED
-
[9:0]
DATAOUT1
PORT1 data output value
Writing data to this register will reflect the data value on the
corresponding port1 pin when it is configured as general purpose
output pin. And writing data to reserved bits is not effective.