Instruction Manual

W90P710CD/W90P710CDG
Publication Release Date: September 19, 2006
- 475 - Revision B2
6.18.2 I2C Serial Interface Control Registers Map
R: read only, W: write only, R/W: both read and write
NOTE1: The reset value of I2C_WR0/1 is 0x3F only when SCR, SDR and SER are connected to pull
high resistor.
REGISTER ADDRESS R/W DESCRIPTION
RESET
VALUE
I2C Interface 0
I2C_CSR0 0xFFF8_6000 R/W I2C0 Control and Status Register 0x0000_0000
I2C_DIVIDER0 0xFFF8_6004 R/W I2C0 Clock Prescale Register 0x0000_0000
I2C_CMDR0 0xFFF8_6008 R/W I2C0 Command Register 0x0000_0000
I2C_SWR0 0xFFF8_600C R/W I2C0 Software Mode Control Register 0x0000_003F
I2C_RxR0 0xFFF8_6010 R I2C0 Data Receive Register 0x0000_0000
I2C_TxR0 0xFFF8_6014 R/W I2C0 Data Transmit Register 0x0000_0000
I2C Interface 1
I2C_CSR1 0xFFF8_6100 R/W I2C1 Control and Status Register 0x0000_0000
I2C_DIVIDER1 0xFFF8_6104 R/W I2C1 Clock Prescale Register 0x0000_0000
I2C_CMDR1 0xFFF8_6108 R/W I2C1 Command Register 0x0000_0000
I2C_SWR1 0xFFF8_610C R/W I2C1 Software Mode Control Register 0x0000_003F
I2C_RxR1 0xFFF8_6110 R I2C1 Data Receive Register 0x0000_0000
I2C_TxR1 0xFFF8_6114 R/W I2C1 Data Transmit Register 0x0000_0000
I2C Control and Status Register 0/1 (I2C_CSR0/1)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
I2C_CSR0 0xFFF8_6000 R/W I2C Control and Status Register 0 0x0000_0000
I2C_CSR1 0xFFF8_6100 R/W I2C Control and Status Register 1 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved I2C_RxACK I2C_BUSY I2C_AL I2C_TIP
7 6 5 4 3 2 1 0
Reserved Tx_NUM Reserved IF IE I2C_EN