User`s guide

VxWorks
BSP Developer’s Guide, 6.0
108
sysOneShotInit( )
This routine is called during board initialization. It configures the one-shot
timer and sets the system power management mode.
Sleep cycles can occur rarely or frequently depending on system load. Three load
conditions must be considered when designing a one-shot timer:
■
An I/O intensive environment with little computation.
If the system is fielding frequent interrupts, it may cycle through awake and
idle states many times during one typical system tick period. Each time the
core powers back up, current system time is recomputed. Small errors in this
calculation can add up, causing clock drift. Care must be taken to accurately
compute current time whenever the core powers back up
■
A computation-intensive environment with few interrupts.
In this environment, the system may not sleep for extended periods of time.
The system timer interrupt is typically disabled when the system is idle, but
must be turned back on when the core is powered up. Re-enabling the system
timer interrupt allows system time to advance when the system remains busy
(awake) during tick expirations.
■
An environment with few interrupts and little computation.
In this environment, the system sleeps for extended periods of time. The
one-shot timer is typically programmed for the maximum sleep time that
hardware supports. This may require changing prescaler or postscaler values
in the one- shot timer configuration registers. Re-scaling the one-shot timer
may reduce the timer accuracy. It must be phase-locked with the system timer
whenever it is activated. Ideally, the system timer should be left on while the
system sleeps, but should have its interrupt inhibited. This allows the one-shot
timer to regain phase lock with the system timer with little effort.
When the system powers back up, it re-synchronizes time with the system
timer. This synchronization prevents clock drift.
One-Shot Timer Examples
Two examples of one-shot timers are provided with your distribution, the ARM
Amba timer and the PowerPC m8260 timer. Source for these timers are provided
in target/src/drv/timer/ambaTimer.c and target/src/drv/timer/m8260Timer.c
respectively.
The PowerPC timer supports power management using the system timer. This
timer is a free-running timer that generates an interrupt when the timer count
matches the value set in one of the timer match registers. With each interrupt, the