User`s guide

VxWorks
BSP Developer’s Guide, 6.0
134
cache entry points to. In this case, the modification that was made by the device is
never visible to the processor.
When cache is enabled, the initial setting should be to write-through mode if
possible. In this mode, the processor does not write to cache without modifying
RAM.
If problems occur, they are likely caused by failure to invalidate the cache before
reading a device register. When the processor is set to write-back mode, problems
can occur both from failure to invalidate the cache before reading the device
register and from failure to flush the cache after writing to the device register.
Once the system works in write-through mode, the cache can be configured to
write-back mode. If problems occur at this point, they are most likely related to
failure to flush the cache after writing to a device register.
In general, if the problem cannot be isolated reasonably quickly, a good procedure
is to disable all possible devices, and then re-introduce them into the system one at
a time. In this way, when the problem occurs, you know which driver is causing it.
As specified previously, problems occurring when the cache is configured as
write-through are often related to failure to invalidate cache before reading a
device register. Problems occurring when the cache is configured in write-back
mode can be caused by a failure to flush the cache immediately after a write
operation.
Timing Issues
Another set of problems related to cache are timing issues. These problems are
extremely difficult to debug. If a device writes to a register between the time that
the processor writes to a register within the same cache line and the time that the
processor flushes the write, the device may not function correctly. It is best to
insure that the driver does not write to device registers at a time when the device
may also be modifying a nearby register.
How you accomplish this depends on the design of the device.