User guide

DS512 March 1, 2011 www.xilinx.com 49
Product Specification
LogiCORE IP Block Memory Generator v6.1
Parameters
• softecc: This parameter enables the Soft ECC logic for Kintex-7, Virtex-7, Virtex-6, and Spartan-6
device families.
• register_porta_input_of_softecc: This parameter registers the input ports in the design.
• register_portb_output_of_softecc: This parameter registers the output ports in the design.
• use_error_injection_pins: This parameter enables single and/or double-bit error injection
capability during Write operations
• error_injection_type: This parameter specifies the type of the error injection done in the Soft ECC
logic. The error injection type can be either “Single_Bit_Error_Injection” or
“Double_Bit_Error_Injection” or “Single_and_Double_Bit_Error_Injection.”
Parameter - Port dependencies
• When the softecc parameter is enabled: SBITERR, DBITERR and RDADDRECC ports are made
available on the IO interface.
• When the use_error_injection_pins parameter is enabled and “Single_Bit_Error_Injection” option
is selected: INJECTSBITERR port is made available on the IO interface.
• When the use_error_injection_pins parameter is enabled and “Double_Bit_Error_Injection”
option is selected: INJECTDBITERR port is made available on the IO interface