User guide

DS512 March 1, 2011 www.xilinx.com 73
Product Specification
LogiCORE IP Block Memory Generator v6.1
Behavioral Simulation Model Options
Select the type of warning messages generated by the behavioral simulation model. Select whether the
model should assume synchronous clocks (Common Clock) for collision warnings.
Information Section
This section displays an informational summary of the selected core options.
• Memory Type: Reports the selected memory type.
• Block RAM Resources: Reports the exact number of 9K, 18K and 36K block RAM primitives
which will be used to construct the core.
• Total Port A Read Latency: The number of clock cycles for a Read operation for port A. This value
is controlled by the optional output registers options for port A on the previous screen.
• Total Port B Read Latency: The number of clock cycles for a Read operation for port B. This value
is controlled by the optional output registers options for port B on the previous screen.
• Address Width: The actual width of the address bus to each port.
Specifying Initial Memory Contents
The Block Memory Generator core supports memory initialization using a memory coefficient (COE)
file or the default data option in the CORE Generator GUI, or a combination of both.
The COE file can specify the initial contents of each memory location, while default data specifies the
contents of all memory locations. When used in tandem, the COE file can specify a portion of the
memory space, while default data fills the rest of the remaining memory space. COE files and default
data is formatted with respect to the port A Write width (or port A Read width for ROMs).
A COE is a text file which specifies two parameters:
• memory_initialization_radix: The radix of the values in the memory_initialization_vector. Valid
choices are 2, 10, or 16.
• memory_initialization_vector: Defines the contents of each memory element. Each value is LSB-
justified, separated by a space, and assumed to be in the radix defined by
memory_initialization_radix.
The following is an example COE file. Note that semi-colon is the end of line character.
; Sample initialization file for a
; 8-bit wide by 16 deep RAM
memory_initialization_radix = 16;
memory_initialization_vector =
12, 34, 56, 78, AB, CD, EF, 12, 34, 56, 78, 90, AA, A5, 5A, BA;
Block RAM Usage
The Information panel (screen 5 of the Block Memory Generator GUI) reports the actual number of 9K,
18K and 36K block RAM blocks to be used.
To estimate this value when using the fixed primitive algorithm, the number of block RAM primitives
used is equal to the width ratio (rounded up) multiplied by the depth ratio (rounded up), where the
width ratio is the width of the memory divided by the width of the selected primitive, and the depth
ratio is the depth of the memory divided by the depth of the primitive selected.
To estimate block RAM usage when using the low power algorithm requires a few more calculations: