User guide

DS512 March 1, 2011 www.xilinx.com 77
Product Specification
LogiCORE IP Block Memory Generator v6.1
Block Memory Generator Resource Utilization and Performance
Examples
Native Block Memory Generator Resource Utilization and Performance
Examples
The following tables provide examples of actual resource utilization and performance for Native Block
Memory Generator implementations. Each section highlights the effects of a specific feature on
resource utilization and performance. The actual results obtained will depend on core parameter
selections, such as algorithm, optional output registers, and memory size, as well as surrounding logic
and packing density.
Benchmarks were taken using a design targeting a Virtex-4 FPGA in the -10 speed grade (4VLX60-
FF1148-10), Virtex-5 FPGA in the -1 speed grade (5VLX30-FF324-1), Virtex-6 FPGA in the -1 speed
grade (XC6VLX365T-FF1759-1) and a Spartan-6 FPGA in the -2 speed grade (XC6SLX150T-FGG484-2).
Better performance may be possible with higher speed grades.
In the benchmark designs described below, the core was encased in a wrapper with input and output
registers to remove the effects of IO delays from the results; performance may vary depending on the
user design. The minimum area algorithm was used unless otherwise noted. It is recommended that
users register their inputs to the core for better performance. The following examples highlight the use
of embedded registers in Virtex-4, Virtex-5, Virtex-6 and Spartan-6 devices, and the subsequent
performance improvement that may result.
Single Primitive
The Block Memory Generator does not add additional logic if the memory can be implemented in a
single Block RAM primitive. Table 22 through Table 25 define performance data for single-primitive
memories.
Table 22: Single Primitive Examples - Virtex-6 FPGAs
Memory
Type
Options
Width
x
Depth
Resource Utilization
Performance
(MHz)
Block RAMs
Shift
Regs
FFs LUTs
(1)
1. LUTs are reported as the number of 4-input LUTs, and do not reflect the number of LUTs used as a route-through.
36K 16K 8K
Tr ue
Dual-port
RAM
No Output
Registers
36x512 1 0 0 0 0 0 325
9x2k 0 1 0 0 0 0 325
Embedded Output
Registers
36x512 1 0 0 0 0 0 450
9x2k 0 1 0 0 0 0 450