User's Manual

Table Of Contents
4. - ST-3118 RF DESCRIPTION
4.1. Circuit Configuration
The receiver is a single receiver with
built DSP fully integrated.
Incoming signals from the antenna,
after passing through LPF filter, are
fed direct to the DSP down
converter to get the baseband voice
from 0Hz to 3500Hz.
Demodulated signals are filtered
and conditioned onto a second DSP
based filter, which also includes a
high efficiency 4FSK modem.
For digital demodulation, the
recovered data is fed into a vocoder,
which converts the data to voice.
Analog voice form the analog path
or the analog voice recovered from
the vocoder are fed into an audio
power amplifier.
The transmit signal frequency is
generated by the integrated VCO
and PLL. RF frequency generated by
the integrated RF chip is amplified
into a 3-step amplifier then filtered
by a low pass filter to be applied to
the antenna.
4.2. Receiver System
4.2.1. Front-end RF Receiver
Incoming RF signals from the
antenna are delivered to the
Receiver Unit and pass through a
Low-pass filter, antenna switching
diodes, and then fed to the receiver
(U2) passing through a limiter BPF.
4.2.2. ANALOG Audio Processing
The RF signal is tuned by U2, which
includes a base band DSP audio
processing, recovering flat audio
from DC up to 3500 hz.
The detected audio is amplified,
filtered and conditioned inside of
U12 which also includes a de-
emphasize filtering shape for
received audio signals
The output of the filtered and
conditioned audio is delivered to a
power amplifier (U8) then to the
speaker passing through the
external audio connector switch.
4.2.3. Virtual Squelch Circuit
RSSI is measured by the receiver
(U2) as the result of the analysis of
the signal and the noise of the
carrier. The output is sent to the
main processor (U13) as a digital
frame, which is analyzed by radio
firmware. If the signal quality is
higher than the expected for the
current programmed squelch
threshold, then the processor
LPF
SWITCH
PROTECTION
FILTER
RECEIVER
[U2]
RECEIVER
[U2]
AUDIO
PROCESSOR
[U12]
AMPLIFIER
[U8]
Figure 1: Receiver block Diagram
Figure 2: Receiver Analog Audio Path Bloc Diagram