User's Manual

Table Of Contents
MM102558V1 R1A
Interface
Board
Backplane
Figure 6-2: MASTR III ADC T/R Shelf Backplane and Interface Board
6.1.2.1 Transmitter Synthesizer Module
The Transmitter Synthesizer Module (TX SYN) model EA101685, shown
in
Figure 6-3, provides the RF excitation for the input of the base station
RF Power Amplifier.
The output of the TX synthesizer is a Frequency-Modulated (FM) signal
and derives its reference oscillator signal from either the Receiver
Synthesizer Module or Data Module in Transmit-Only base stations.
Figure 6-3: Transmitter
Synthesizer Module
6.1.2.2 Receiver Synthesizer Module
The Receiver Synthesizer (RX SYN) module EA101684, shown in
Figure 6-4, generates a Phase Locked Loop (PLL) Local Oscillator (LO)
signal used by the Receiver Front End Module in the ADC T/R Shelf.
The Synthesizer Module follows operational and frequency determining
instructions from the System Module to select between an external or
internal reference oscillator which provides a highly stable reference for
the PLL to operate. The Receiver Synthesizer Module also provides the
selected reference oscillator signal to the Transmitter Synthesizer Module.
Figure 6-4: Receiver
Synthesizer Module
6.1.2.3 Receiver Front End Module
The Receiver Front End (RxFE) Module 19D902782, shown in
Figure 6-5, provides Front End band pass tuning capable of passing the
desired receiver frequency while providing first L.O. image rejection and
L.O. signal isolation at the antenna port. The RxFE also mixes the RF
signal from the band pass circuit with the Receiver Synthesizer signal to
create the First Intermediate Frequency (IF) signal, 21.4 MHz for VHF
and UHF systems, and 70.2 MHz for 800 MHz systems. Finally, the First
IF signal is passed to the receiver IF module.
Figure 6-5: Receiver
Front End Module
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