RTL8187L 802.11b/g RTL8187 miniCard Rev. 1.
RTL8187L Datasheet COPYRIGHT ©2005 Realtek Semiconductor Corp. All rights reserved. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any means without the written permission of Realtek Semiconductor Corp. DISCLAIMER Realtek provides this document “as is”, without warranty of any kind, neither expressed nor implied, including, but not limited to, the particular purpose.
RTL8187L Datasheet Table of Contents 1. GENERAL DESCRIPTION ...............................................................................................................................................1 2. FEATURES ..........................................................................................................................................................................2 3. SYSTEM APPLICATIONS ..............................................................................................
RTL8187L Datasheet 10.3. 11. PACKET RECOGNITION ..............................................................................................................................................21 FUNCTIONAL DESCRIPTION ..................................................................................................................................22 11.1. TRANSMIT & RECEIVE OPERATIONS..........................................................................................................................
RTL8187L Datasheet TABLE 20. SET FEATURE DEVICE ..................................................................................................................................................15 TABLE 21. CLEAR FEATURE DEVICE .............................................................................................................................................16 TABLE 22. SET CONFIG 0 .....................................................................................................................
RTL8187L Datasheet 1. General Description The Realtek RTL8187L is a low-profile highly integrated cost-effective Wireless LAN USB 2.0 network interface controller that integrates a USB 2.0 PHY, SIE (Serial Interface Engine), 8051 MCU, a Wireless LAN MAC, and a Direct Sequence Spread Spectrum/OFDM baseband processor onto one chip. It provides USB high speed (480Mbps), and full speed (12Mbps), and supports 4 endpoints for transfer pipes.
RTL8187L Datasheet 2. Features 128-Pin LQFP and 128-pin LQFP Lead (Pb)-Free package State machine implementation without external memory (RAM, flash) requirement Complies with IEEE 802.
RTL8187L Datasheet Supports digital loopback capability on both ports Supports 4 endpoints: 64-Byte buffer for control endpoint Scatter and gather operation 512-Byte buffer for bulk IN endpoint Complies with USB Specification 2.0 Two 512-Byte buffers for bulk OUT endpoint Supports Full-speed (12Mbps) and High-speed (480Mbps) Embedded standard 8051 CPU with enhanced features: Four cycles per instruction Variable clock speed cuts power consumption 3.3V and 1.
RTL8187L Datasheet 4.
RTL8187L Datasheet 5. Pin Assignments Figure 2. Pin Assignments 5.1. Lead (Pb)-Free Package Identification Lead (Pb)-free package is indicated by an ‘L’ in the location marked ‘T’ in Figure 2. Wireless LAN Network Interface Controller 4 Track ID JATR-1076-21 Rev. 1.
RTL8187L Datasheet 6. Pin Descriptions In order to reduce pin count, and therefore size and cost, some pins have multiple functions. In such cases, the functions are separated with a ‘/’ symbol. Refer to the Pin Assignments diagram on page 4 for a graphical representation. The following signal type codes are used in the tables: I: Input. S/T/S: Sustained Tri-State. O: Output O/D: Open Drain. T/S: Tri-State bi-directional input/output pin. 6.1. USB Transceiver Interface Table 1.
RTL8187L Datasheet 6.4. LED Interface Table 4. LED Interface Symbol LED0, 1 Type O Pin No 48, 56 Description LED Pins (Active low) LEDS1~0 00 01 10 11 LED0 TX/RX TX/RX TX LINK/ACT LED1 Infrastructure LINK RX Infrastructure During power down mode, the LED signals are logic high. 6.5. Attachment Unit Interface 6.5.1. RTL8225 RF Chipset Table 5.
RTL8187L Datasheet Symbol GPIO4 GPIO5 VREFO VRP VRN RXIP RXIN RXQP RXQN RXAGC TXAGC RSSI TSSI0 TSSI1 TXQP TXQN TXIP TXIN TXQTP TXQTN TXITP TXITN Type O O X X X I I I I I O I I I I I O O O O O O Pin No 100 94 118 119 120 121 122 124 125 4 5 6 7 8 11 12 14 13 15 16 17 18 Description General purpose input/output pin. General purpose input/output pin. Not used in the RTL8225 RF chipset. Not used in the RTL8225 RF chipset. Not used in the RTL8225 RF chipset. Receive (Rx) In-phase Analog Data.
RTL8187L Datasheet Symbol RFTXEN RFRXEN GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] VREFO VRP VRN RXIP RXIN RXQP RXQN RXAGC TXAGC RSSI TSSI0 TSSI1 TXQP TXQN TXIP TXIN TXQTP TXQTN TXITP TXITN Type O O O O O O O O X X X I I I I O O I I I O O O O O O O O Pin No 102 113 67 68 69 70 100 94 118 119 120 121 122 124 125 4 5 6 7 8 11 12 14 13 15 16 17 18 Description Not used in the RTL8255 RF chipset. Not used in the RTL8255 RF chipset. General purpose input/output pin. General purpose input/output pin.
RTL8187L Datasheet 7. CPU Access to Endpoint Data 7.1. Control Transfer Control transfers configure and send commands to a device. Because they are so important, they employ extensive USB error checking. The host reserves a portion of each USB frame for control transfers. Control transfers consist of two or three stages. The SETUP stage contains eight bytes of USB control data. An optional DATA stage contains more data, if required.
RTL8187L Datasheet 8. USB Request 8.1. Get Descriptor-Device Table 8. Get Descriptor-Device Setup Transaction BmReq 80 bReq 06 wValueL 00 wValueH 01 wIndexL 00 wIndexH 00 wLengthL Lengh_L wLengthH Length_H DATA3 02 81 DATA4 00 00 DATA5 00 01 DATA6 00 01 DATA7 40 02 DATA3 01 81 DATA4 00 00 DATA5 00 01 DATA6 00 01 DATA7 40 02 High Speed Data Transaction DATA0 12 DA 03 DATA1 01 0B 01 DATA2 00 87 Full Speed Data Transaction DATA0 12 DA 03 DATA1 01 0B 01 DATA2 10 87 8.2.
RTL8187L Datasheet 8.3. Get Descriptor-Configuration Table 10.
RTL8187L Datasheet 8.5. Get Descriptor-String Index 1 Table 12. Get Descriptor-String Index 1 Setup Transaction BmReq 80 bReq 06 wValueL 01 wValueH 03 wIndexL 09 wIndexH 04 wLengthL Lengh_L DATA2 52 74 DATA3 00 00 DATA4 65 65 DATA5 00 00 DATA6 61 6B wLengthH Length_H Data Transaction DATA0 10 6C DATA1 03 00 DATA7 00 00 8.6. Get Descriptor-String Index 2 Table 13.
RTL8187L Datasheet 8.7. Get Descriptor-String Index 3 Table 14. Get Descriptor-String Index 3 Setup Transaction BmReq 80 bReq 06 wValueL 03 wValueH 03 wIndexL 09 wIndexH 04 wLengthL Lengh_L DATA2 30 34 30 DATA3 00 00 00 DATA4 30 63 30 DATA5 00 00 00 DATA6 65 30 30 wLengthH Length_H Data Transaction DATA0 1A 30 30 31 DATA1 03 00 00 00 DATA7 00 00 00 8.8. Get Descriptor-String Index 4 Table 15.
RTL8187L Datasheet 8.9. Get Descriptor-String Index 5 Table 16. Get Descriptor-String Index 5 Setup Transaction BmReq 80 bReq 06 wValueL 05 wValueH 03 wIndexL 09 wIndexH 04 wLengthL Lengh_L DATA2 42 2D 42 2D 2C 6B 54 DATA3 00 00 00 00 00 00 00 DATA4 75 49 75 4F 42 2D DATA5 00 00 00 00 00 00 DATA6 6C 4E 6C 55 75 4F wLengthH Length_H Data Transaction DATA0 34 6B 2C 6B 54 6C 55 DATA1 03 00 00 00 00 00 00 DATA7 00 00 00 00 00 00 8.10. Get Descriptor-Other Speed Configuration Table 17.
RTL8187L Datasheet 8.11. Set Address Table 18. Set Address Setup Transaction BmReq bReq 00 05 Note: No data transaction. wValueL addrL wValueH addrH wIndexL 00 wIndexH 00 wLengthL 00 wLengthH 00 wIndexH 00 wLengthL 00 wLengthH 00 wIndexH 00 wLengthL 00 wLengthH 00 8.12. Set Interface 0 Table 19. Set Interface 0 Setup Transaction BmReq bReq 01 0B Note: No data transaction. wValueL 00 wValueH 00 wIndexL 00 8.13. Set Feature Device Table 20.
RTL8187L Datasheet 8.14. Clear Feature Device Table 21. Clear Feature Device Setup Transaction BmReq bReq 00 01 Note: No data transaction. wValueL 01 wValueH 00 wIndexL 00 wIndexH 00 wLengthL 00 wLengthH 00 wIndexH 00 wLengthL 00 wLengthH 00 wIndexH 00 wLengthL 00 wLengthH 00 8.15. Set Config 0 Table 22. Set Config 0 Setup Transaction BmReq bReq 00 09 Note: No data transaction. wValueL 00 wValueH 02 wIndexL 00 8.16. Set Config 1 Table 23.
RTL8187L Datasheet 9. EEPROM (93C46 or 93C56) Contents The RTL8187L supports the attachment of an external EEPROM. The 93C46 is a 1Kbit EEPROM (the 93C56 is a 2Kbit EEPROM). The EEPROM interface provides the ability for the RTL8187L to read from, and write data to, an external serial EEPROM device. If the EEPROM is not present, the RTL8187L initialization uses default values for the Operational Registers. Software can read and write to the EEPROM using “bit-bang” accesses via the 9346CR Register.
RTL8187L Datasheet Bytes 0Dh Contents CONFIG3 0Eh~13h MAC Address 14h 15h CONFIG1 16h~17h 18h CRC CONFIG2 19h CONFIG4 1Ah~1Dh ANA_PARM 1Eh TESTR 1Fh 20h OFDM_TxPower 1 OFDM_TxPower 2 OFDM_TxPower 3 OFDM_TxPower 4 OFDM_TxPower 5 OFDM_TxPower 6 OFDM_TxPower 7 OFDM_TxPower 8 OFDM_TxPower 9 OFDM_TxPower 10 OFDM_TxPower 11 OFDM_TxPower 12 CCK_TxPower1 21h 22h 23h 24h 25h 26h 27h 28h 29h 2Ah 2Bh 2Ch Description RTL8187L Configuration register 3. Operational register FF59h. MAC Address.
RTL8187L Datasheet Bytes 2Dh Contents CCK_TxPower2 2Eh CCK_TxPower3 2Fh CCK_TxPower4 30h CCK_TxPower5 31h CCK_TxPower6 32h-35h ANA_PARM2 36h CCK_TxPower11 37h CCK_TxPower12 38h CCK_TxPower13 39h CCK_TxPower14 3Ah-6Bh 6Ch-79h 7Ah Manufacture String & Product String CCK_TxPower7 7Bh CCK_TxPower8 7Ch CCK_TxPower9 7Dh CCK_TxPower10 Description Transmit Power Level for 802.11b(g)-defined channel_ID 2 (center frequency=2417MHz). Transmit Power Level for 802.
RTL8187L Datasheet 9.1. EEPROM Registers Summary Table 25.
RTL8187L Datasheet 10. USB Packet Buffering The RTL8187L incorporates two independent FIFOs for transferring data to/from the system interface and from/to the network. The FIFOs provide temporary storage of data, freeing the host system from the real-time demands of the network. The way in which the FIFOs are emptied and filled is controlled by the FIFO threshold values in the Receive Configuration registers. These values determine how full or empty the FIFOs must be before the device requests the bus.
RTL8187L Datasheet 11. Functional Description 11.1. Transmit & Receive Operations The RTL8187L supports a new descriptor-based buffer management that will significantly lower host CPU utilization. The RTL8187L supports transmit descriptor and receive descriptor in memory. Each OUT packet contains 3-double-word transmit descriptors and each IN packet contains 4-double-word receive descriptors. 11.1.1. Transmit Tx Descriptor Format Table 27.
RTL8187L Datasheet Table 28. Tx Status Descriptor Offset# 0 Bit# 31:28 Symbol RSVD 0 27:24 TXRATE 0 23 RTSEN 0 22:19 RTSRATE 0 18 CTSEN Description Reserved. Tx Rate. These four bits indicate the current frame’s transmission rate. Bit 27 Bit 26 Bit 25 1Mbps 0 0 0 2Mbps 0 0 0 5.5Mbps 0 0 1 11Mbps 0 0 1 6Mbps 0 1 0 9Mbps 0 1 0 12Mbps 0 1 1 18Mbps 0 1 1 24Mbps 1 0 0 36Mbps 1 0 0 48Mbps 1 0 1 54Mbps 1 0 1 Reserved All other combinations Bit 24 0 1 0 1 0 1 0 1 0 1 0 1 RTS Enable.
RTL8187L Datasheet Offset# 0 Bit# 17 0 16 0 15 0 14:12 0 11:0 TPKTSIZE 4 31 LENGEXT 4 30:16 Length 4 15:0 RTSDUR 8 31:28 8 8 8 8 8 8 27:25 24 23:16 15:8 7:4 3:0 RATE_FALL BACK_LIMIT RSVD ANTENNA AGC RETRY_LIMIT CWMAX CWMIN Symbol MOREFRAG Description More Fragment. This bit is set to 1 in all data type frames that have another fragment of the current packet to follow. SPLCP Short Physical Layer Convergence Protocol format.
RTL8187L Datasheet 11.1.2. Receive Rx Descriptor Format Table 29. Rx Descriptor Format 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 RSVD D M A F F O V F RSVD (6 bits) S P L C P W A K E U P R R M P B R P C S RXRATE S A A A E W R V (4 bits) V R M R S R C D D M 3 G 2 T D A E N AGC (8 bits) C T R E Y N P N T A E D I C V 6 5 4 3 2 1 0 Offset 0 Frame_Length (12 bits) Offset 4 RSSI (7 bits) TSFTL TSFTH SQ (8 bits) Offset 8 Offset 12 Table 30.
RTL8187L Datasheet Offset# 0 Bit# 23:20 Symbol RXRATE 0 0 19 18 RSVD MAR 0 17 PAM 0 16 BAR 0 15 RES 0 14 PWRMGT 0 13 CRC32 0 12 ICV 0 11:0 Frame_Length Description Rx Rate. These four bits indicate the current frame’s receiving rate. Bit 23 Bit 22 Bit 21 Bit 20 1Mbps 0 0 0 0 2Mbps 0 0 0 1 5.5Mbps 0 0 1 0 11Mbps 0 0 1 1 6Mbps 0 1 0 0 9Mbps 0 1 0 1 12Mbps 0 1 1 0 18Mbps 0 1 1 1 24Mbps 1 0 0 0 36Mbps 1 0 0 1 48Mbps 1 0 1 0 54Mbps 1 0 1 1 Reserved All other combinations Reserved.
RTL8187L Datasheet Offset# 4 Bit# 7:0 Symbol SQ 8 31:0 TSFTL Description Signal Quality. The SQ is a measure of the quality of BAKER code lock, providing an effective measure during the full reception of a PLCP preamble and header. A snapshot of the TSFTR’s least significant 32 bits. 12 31:0 TSFTH A snapshot of the TSFTR’s most significant 32 bits. 11.2. Loopback Operation Loopback mode is normally used to verify that the logic operations have performed correctly.
RTL8187L Datasheet 11.5. LED Functions The RTL8187L supports 2 LED signals in 4 configurable operation modes. The following sections describe the different LED actions. 11.5.1. Link Monitor The Link Monitor senses the link integrity. Whenever link status is established, the specific link LED pin is driven low. 11.5.2. Infrastructure Monitor The Infrastructure Monitor senses the link integrity of an Infrastructure network.
RTL8187L Datasheet 11.5.4. Tx LED Blinking of the Tx LED indicates that transmit activity is occurring. Power On LED = High Transmitting Packet? No Yes LED = High for (100 +- 10) ms LED = Low for (12 +- 2) ms Figure 4. Tx LED 11.5.5. Tx/Rx LED Blinking of the Tx/Rx LED indicates that both transmit and receive activity is occurring. Power On LED = High Tx/Rx Packet? No Yes LED = High for (100 +- 10) ms LED = Low for (12 +- 2) ms Figure 5.
RTL8187L Datasheet 11.5.6. LINK/ACT LED Blinking of the LINK/ACT LED indicates that the RTL8187L is linked and operating properly. If this LED is high for extended periods it indicates that a link problem exists. Power On LED = High No Link? Yes LED = Low No Tx/Rx packet? Yes LED = High for (100 +- 10) ms LED = Low for (12 +- 2) ms Figure 6. LINK/ACT LED Wireless LAN Network Interface Controller 30 Track ID JATR-1076-21 Rev. 1.
RTL8187L Datasheet 12. Application Diagram Main/Aux. Power Regulators Power 3.3V, 1.8V LED External ROM/RAM Power 3.3V, 1.8V Power 3.3V, 1.8V RTL8187L Antenna External RF Devices Base Band 40MHz Clock D+ MAC SIE EEPROM D- Power 3.3V Figure 7. Application Diagram Wireless LAN Network Interface Controller 31 Track ID JATR-1076-21 Rev. 1.
RTL8187L Datasheet 13. Electrical Characteristics 13.1. Temperature Limit Ratings Table 31. Temperature Limit Ratings Parameter Storage temperature Operating temperature Minimum -55 -10 Maximum +125 70 Units °C °C 13.2. DC Characteristics Table 32. DC Characteristics Symbol VDD33 VDD18 Voh Vol Vih Vil Iin Ioz Icc Parameter Conditions Minimum 3.3V Supply Voltage 3.0 1.8V Supply Voltage 1.7 Minimum High Level Output Ioh = -8mA 0.
RTL8187L Datasheet 13.3. AC Characteristics 13.3.1. Serial EEPROM Interface Timing (93C46(64*16)/93C56(128*16)) EESK EECS EEDI tcs (Read) 1 1 0 An A2 A1 A0 (Read) 0 EEDO High Impedance Dn D1 D0 EESK EECS EEDI tcs (Write) 1 0 1 An ... A0 Dn ... D0 (Write) EEDO High Impedance BUSY READY twp tsk EESK tskh EECS tcss tdis tcsh tskl tdih EEDI tdos tdoh EEDO (Read) EEDO tsv STATUS VALID (Program) Figure 8. Serial EEPROM Interface Timing Table 33.
RTL8187L Datasheet 14. Mechanical Dimensions See the Mechanical Dimensions notes on the next page. Wireless LAN Network Interface Controller 34 Track ID JATR-1076-21 Rev. 1.
RTL8187L Datasheet 14.1. Mechanical Dimensions Notes Symbol A A1 A2 b c D D1 e E E1 L L1 Θ Dimension in inch Min Typical Max 0.063 0.002 0.053 0.055 0.057 0.005 0.007 0.009 0.004 0.006 0.624 0.630 0.636 0.547 0.551 0.555 0.016 BSC 0.624 0.630 0.636 0.547 0.551 0.555 0.018 0.024 0.030 0.039 REF 0° 3.5° 7° Dimension in Min Typical 0.05 1.35 1.40 0.13 0.18 0.09 15.85 16.00 13.90 14.00 0.40 BSC 15.85 16.00 13.90 14.00 0.45 0.60 1.00 REF 0° 3.5° Wireless LAN Network Interface Controller Note: 1.
RTL8187L Datasheet 15. Ordering Information Table 34. Ordering Information Part Number RTL8187L RTL8187L-LF Package 128-pin LQFP RTL8187L with Lead (Pb)-Free package Status MP MP Realtek Semiconductor Corp. Headquarters No. 2, Industry East Road IX, Science-based Industrial Park, Hsinchu, 300, Taiwan, R.O.C. Tel: 886-3-5780211 Fax: 886-3-5776047 www.realtek.com.tw Wireless LAN Network Interface Controller 36 Track ID JATR-1076-21 Rev. 1.
Federal Communication Commission Interference Statement This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
Modular Approval OEM integrator is still responsible for testing their end product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.). IMPORTANT NOTE: In the event that these conditions can not be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID can not be used on the final product.
This device has been designed to operate with an antenna having a maximum gain of [3.00] dBi. Antenna having a higher gain is strictly prohibited per regulations of Industry Canada. The required antenna impedance is 50 ohms." List of antennas below: Ant. Type PIFA 1. Connector IPEX Ant. Type PIFA 3. Connector IPEX Ant. Type PIFA 5. Connector IPEX Ant. Type PIFA 7. Connector IPEX Ant. Type PIFA 9. Connector IPEX 11 Ant. Type PIFA . Connector IPEX 13 Ant. Type PIFA . Connector IPEX 15 Ant. Type PIFA .
Installation Guide__ Realtek RTL8187 + RTL8225-VF (Z2) 802.11 b/g miniCard Date: 2006/06/06 Version: 1.0 This document is subject to change without notice. The document contains Realtek confidential information and must not be disclosed to any third party without appropriate NDA.
Installation Description This module is to be installed only by the professionals. When IRF303JU/IRF303U2is installed in a product, we shall consider the following points; 1. Since RTL8187 miniCard owns its FCC ID Number/IC Number, we shall affix an exterior label on the outside of the product if the FCC ID/IC Number is not visible.
