User's Manual

PRELIMINARY
PRELIMINARY PRELIMINARY
PRELIMINARY –
Service
ServiceService
Service Manual
Manual Manual
Manual
DR CHKD APPD
31
The operating frequency is generated by Q4 in transmit mode and Q3 in receive mode. The
oscillator frequency is controlled by applying the VCO control voltage, obtained from the phase
comparator, to the varactor diodes (D2 and D4 in transmit mode and D1 and D3 in receive mode)
. The T/R pin is set high in receive mode causing Q5 and Q7 to turn Q4 off, and turn Q3 on. The
T/R pin is set low in transmit mode. The outputs from Q3 and Q4 are amplified by Q6 and sent to
the buffer amplifiers.
Fig. 4. PLL circuit
4) UNLOCK DETECTOR
If a pulse signal appears at the LD pin of IC1, an unlock condition
occurs, and the DC voltage obtained from D7, R6, and C1 causes the
voltage applied to the UL pin of the microprocessor to go low. When the
microprocessor detects this condition, the transmitter is disabled,
ignoring the push-to-talk switch input signal. (See Fig. 5)
Fig.5. Unlock detector circuit
4Transmitter
1
Transmit audio
The modulation signal from the microphone is amplified by IC500
(1/2), passes through a preemphasis circuit, and amplified by the other
IC500 (1/2) to perform IDC operation. The signal then passes through a low-
pass filter (splatter filter) (Q501 and Q502) and cuts 3kHz and higher