User's Manual

RYZ012 Multi-Standard Wireless Communication Module for Bluetooth 5 Low Energy and 802.15.4
R15UH0002EU0103 Rev.1.03 Page 15 of 206
Apr.21.21
Figure 21. Audio Input Path ...............................................................................................................................................................................121
Figure 22. Audio Input Processing ....................................................................................................................................................................122
Figure 23. Audio Output Path ............................................................................................................................................................................147
Figure 24. Linear Interpolation ...........................................................................................................................................................................148
Figure 25. Delay Interpolation ...........................................................................................................................................................................148
Figure 26. SDM Block Diagram .........................................................................................................................................................................149
Figure 27. Common Mode .................................................................................................................................................................................156
Figure 28. Double Accuracy Mode ....................................................................................................................................................................157
Figure 29. Read Real-time Counting Value .......................................................................................................................................................157
Figure 30. Shuttle Mode ....................................................................................................................................................................................158
Figure 31. Timing Sequence .............................................................................................................................................................................158
Figure 32. Conversion Sequence for all Channels ............................................................................................................................................162
Figure 33. Block Diagram of PGA .....................................................................................................................................................................176
Figure 34. Block Diagram of Temperature Sensor ............................................................................................................................................179
Figure 35. Block Diagram of Low Power Comparator .......................................................................................................................................180
Figure 36. Block Diagram of RF Transceiver.....................................................................................................................................................187
Figure 37. Recommended Soldering Profile ......................................................................................................................................................205
List of Tables
Table 1. Pin Descriptions .....................................................................................................................................................................................17
Table 2. Register File ..........................................................................................................................................................................................18
Table 3. Physical Memory Map ...........................................................................................................................................................................19
Table 4. Flash Memory Partition ..........................................................................................................................................................................20
Table 5. E-Fuse Information ................................................................................................................................................................................20
Table 6. Characteristics of the Power Control Logic ............................................................................................................................................25
Table 7. Power Saving Modes Overview .............................................................................................................................................................26
Table 8. List of interrupts .....................................................................................................................................................................................44
Table 9. GPIO Configuration Register Overview .................................................................................................................................................50
Table 10 Peripheral Function Mapping ................................................................................................................................................................52
Table 11. Audio Data Flow Direction .................................................................................................................................................................121
Table 12. Input Pin Selection .............................................................................................................................................................................156
Table 13. Timing Constraints .............................................................................................................................................................................158
Table 14. Configuration Setting for Different ADC Use Cases ..........................................................................................................................163
Table 15. Register Setting for L/R/M Channel ...................................................................................................................................................164
Table 16. Packet Format in Standard 1Mbps Bluetooth Low Energy Mode ......................................................................................................188
Table 17. Packet Format in Standard 2Mbps Bluetooth Low Energy Mode ......................................................................................................188
Table 18. Packet Format in Standard 500kbps/125kbps Bluetooth Low Energy Mode .....................................................................................188
Table 19. Packet Format in 802.15.4 Mode.......................................................................................................................................................188
Table 20. Packet Format in Proprietary Mode ...................................................................................................................................................188