Users Manual
Table Of Contents
- 34. IrDA Interface
- 35. I2C-bus Interface (RIICa)
- 35.1 Overview
- 35.2 Register Descriptions
- 35.2.1 I2C-bus Control Register 1 (ICCR1)
- 35.2.2 I2C-bus Control Register 2 (ICCR2)
- 35.2.3 I2C-bus Mode Register 1 (ICMR1)
- 35.2.4 I2C-bus Mode Register 2 (ICMR2)
- 35.2.5 I2C-bus Mode Register 3 (ICMR3)
- 35.2.6 I2C-bus Function Enable Register (ICFER)
- 35.2.7 I2C-bus Status Enable Register (ICSER)
- 35.2.8 I2C-bus Interrupt Enable Register (ICIER)
- 35.2.9 I2C-bus Status Register 1 (ICSR1)
- 35.2.10 I2C-bus Status Register 2 (ICSR2)
- 35.2.11 Slave Address Register Ly (SARLy) (y = 0 to 2)
- 35.2.12 Slave Address Register Uy (SARUy) (y = 0 to 2)
- 35.2.13 I2C-bus Bit Rate Low-Level Register (ICBRL)
- 35.2.14 I2C-bus Bit Rate High-Level Register (ICBRH)
- 35.2.15 I2C-bus Transmit Data Register (ICDRT)
- 35.2.16 I2C-bus Receive Data Register (ICDRR)
- 35.2.17 I2C-bus Shift Register (ICDRS)
- 35.3 Operation
- 35.4 SCL Synchronization Circuit
- 35.5 SDA Output Delay Function
- 35.6 Digital Noise Filters
- 35.7 Address Match Detection
- 35.8 Automatic Low-Hold Function for SCL
- 35.9 Arbitration-Lost Detection Functions
- 35.10 Start Condition/Restart Condition/Stop Condition Generating Function
- 35.11 Bus Hanging
- 35.12 SMBus Operation
- 35.13 Interrupt Sources
- 35.14 Initialization of Registers and Functions When a Reset is Applied or a Condition is Detected
- 35.15 Event Link Function (Output)
- 35.16 Usage Notes
- 36. CAN Module (RSCAN)
R01UH0823EJ0110 Rev.1.10 Page 1137 of 1852
Nov 30, 2020
RX23W Group 35. I
2
C-bus Interface (RIICa)
35.2.7 I
2
C-bus Status Enable Register (ICSER)
SARyE Bit (Slave Address Register y Enable) (y = 0 to 2)
This bit is used to enable or disable the slave address set in registers SARLy and SARUy.
When this bit is set to 1, the slave address set in registers SARLy and SARUy is enabled and is compared with the
received slave address.
When this bit is set to 0, the slave address set in registers SARLy and SARUy is disabled and is ignored even if it
matches the received slave address.
GCAE Bit (General Call Address Enable)
This bit is used to specify whether to ignore the general call address (0000 000b + 0 (write): All 0) when it is received.
When this bit is set to 1, if the received slave address matches the general call address, the RIIC recognizes the received
slave address as the general call address independently of the slave addresses set in registers SARLy and SARUy (y = 0
to 2) and performs data receive operation.
When this bit is set to 0, the received slave address is ignored even if it matches the general call address.
DIDE Bit (Device-ID Address Detection Enable)
This bit is used to specify whether to recognize and execute the device-ID address when a device ID (1111 100b) is
received in the first byte after a start condition or restart condition is detected.
When this bit is set to 1, if the received first byte matches the device ID, the RIIC recognizes that the device-ID address
has been received. When the following R/W# bit is 0 (write), the RIIC recognizes the second and the following bytes as
slave addresses and continues the receive operation.
When this bit is set to 0, the RIIC ignores the received first byte even if it matches the device ID address and recognizes
the first byte as a normal slave address.
For details on the device-ID address detection, refer to
section 35.7.3, Device-ID Address Detection.
Address(es): RIIC0.ICSER 0008 8306h
b7 b6 b5 b4 b3 b2 b1 b0
HOAE — DIDE — GCAE SAR2E SAR1E SAR0E
Value after reset:
00001001
Bit Symbol Bit Name Description R/W
b0 SAR0E Slave Address Register 0 Enable 0: Slave address in registers SARL0 and SARU0 is disabled.
1: Slave address in registers SARL0 and SARU0 is enabled.
R/W
b1 SAR1E Slave Address Register 1 Enable 0: Slave address in registers SARL1 and SARU1 is disabled.
1: Slave address in registers SARL1 and SARU1 is enabled.
R/W
b2 SAR2E Slave Address Register 2 Enable 0: Slave address in registers SARL2 and SARU2 is disabled.
1: Slave address in registers SARL2 and SARU2 is enabled.
R/W
b3 GCAE General Call Address Enable 0: General call address detection is disabled.
1: General call address detection is enabled.
R/W
b4 — Reserved This bit is read as 0. The write value should be 0. R/W
b5 DIDE Device-ID Address Detection
Enable
0: Device-ID address detection is disabled.
1: Device-ID address detection is enabled.
R/W
b6 — Reserved This bit is read as 0. The write value should be 0. R/W
b7 HOAE Host Address Enable 0: Host address detection is disabled.
1: Host address detection is enabled.
R/W