Users Manual
Table Of Contents
- 34. IrDA Interface
- 35. I2C-bus Interface (RIICa)
- 35.1 Overview
- 35.2 Register Descriptions
- 35.2.1 I2C-bus Control Register 1 (ICCR1)
- 35.2.2 I2C-bus Control Register 2 (ICCR2)
- 35.2.3 I2C-bus Mode Register 1 (ICMR1)
- 35.2.4 I2C-bus Mode Register 2 (ICMR2)
- 35.2.5 I2C-bus Mode Register 3 (ICMR3)
- 35.2.6 I2C-bus Function Enable Register (ICFER)
- 35.2.7 I2C-bus Status Enable Register (ICSER)
- 35.2.8 I2C-bus Interrupt Enable Register (ICIER)
- 35.2.9 I2C-bus Status Register 1 (ICSR1)
- 35.2.10 I2C-bus Status Register 2 (ICSR2)
- 35.2.11 Slave Address Register Ly (SARLy) (y = 0 to 2)
- 35.2.12 Slave Address Register Uy (SARUy) (y = 0 to 2)
- 35.2.13 I2C-bus Bit Rate Low-Level Register (ICBRL)
- 35.2.14 I2C-bus Bit Rate High-Level Register (ICBRH)
- 35.2.15 I2C-bus Transmit Data Register (ICDRT)
- 35.2.16 I2C-bus Receive Data Register (ICDRR)
- 35.2.17 I2C-bus Shift Register (ICDRS)
- 35.3 Operation
- 35.4 SCL Synchronization Circuit
- 35.5 SDA Output Delay Function
- 35.6 Digital Noise Filters
- 35.7 Address Match Detection
- 35.8 Automatic Low-Hold Function for SCL
- 35.9 Arbitration-Lost Detection Functions
- 35.10 Start Condition/Restart Condition/Stop Condition Generating Function
- 35.11 Bus Hanging
- 35.12 SMBus Operation
- 35.13 Interrupt Sources
- 35.14 Initialization of Registers and Functions When a Reset is Applied or a Condition is Detected
- 35.15 Event Link Function (Output)
- 35.16 Usage Notes
- 36. CAN Module (RSCAN)
R01UH0823EJ0110 Rev.1.10 Page 1144 of 1852
Nov 30, 2020
RX23W Group 35. I
2
C-bus Interface (RIICa)
35.2.10 I
2
C-bus Status Register 2 (ICSR2)
Note 1. Only 0 can be written to clear the flag.
TMOF Flag (Timeout Detection Flag)
This flag is set to 1 when the RIIC recognizes timeout after the SCL0 line state remains unchanged for a certain period.
[Setting condition]
• When the SCL0 line state remains unchanged for the period specified by bits ICMR2.TMOH, TMOL, and TMOS
while the ICFER.TMOE bit is 1 (the timeout function is enabled) in master mode or in slave mode and the received
slave address matches.
[Clearing conditions]
• When 0 is written to the TMOF bit after reading TMOF = 1
• When 1 is written to the ICCR1.IICRST bit to apply an RIIC reset or an internal reset
AL Flag (Arbitration-Lost Flag)
This flag shows that bus mastership has been lost (loss in arbitration) due to a bus conflict or some other reason when a
start condition is generated or an address and data are transmitted. The RIIC monitors the level on the SDA0 line during
transmission and, if the level on the line does not match the value of the bit being output, sets the value of the AL flag to
1 to indicate that the bus is occupied by another device.
The RIIC can also detect loss of arbitration during NACK transmission in receive mode or during data transmission in
slave mode.
Address(es): RIIC0.ICSR2 0008 8309h
b7 b6 b5 b4 b3 b2 b1 b0
TDRE TEND RDRF NACKF STOP START AL TMOF
Value after reset:
00000000
Bit Symbol Bit Name Description R/W
b0 TMOF Timeout Detection Flag 0: Timeout is not detected.
1: Timeout is detected.
R/(W)
*
1
b1 AL Arbitration-Lost Flag 0: Arbitration is not lost.
1: Arbitration is lost.
R/(W)
*
1
b2 START Start Condition Detection Flag 0: Start condition is not detected.
1: Start condition is detected.
R/(W)
*
1
b3 STOP Stop Condition Detection Flag 0: Stop condition is not detected.
1: Stop condition is detected.
R/(W)
*
1
b4 NACKF NACK Detection Flag 0: NACK is not detected.
1: NACK is detected.
R/(W)
*
1
b5 RDRF Receive Data Full Flag 0: The ICDRR register contains no receive data.
1: The ICDRR register contains receive data.
R/(W)
*
1
b6 TEND Transmit End Flag 0: Data is being transmitted.
1: Data has been transmitted.
R/(W)
*
1
b7 TDRE Transmit Data Empty Flag 0: The ICDRT register contains transmit data.
1: The ICDRT register contains no transmit data.
R