Users Manual
Table Of Contents
- 34. IrDA Interface
- 35. I2C-bus Interface (RIICa)
- 35.1 Overview
- 35.2 Register Descriptions
- 35.2.1 I2C-bus Control Register 1 (ICCR1)
- 35.2.2 I2C-bus Control Register 2 (ICCR2)
- 35.2.3 I2C-bus Mode Register 1 (ICMR1)
- 35.2.4 I2C-bus Mode Register 2 (ICMR2)
- 35.2.5 I2C-bus Mode Register 3 (ICMR3)
- 35.2.6 I2C-bus Function Enable Register (ICFER)
- 35.2.7 I2C-bus Status Enable Register (ICSER)
- 35.2.8 I2C-bus Interrupt Enable Register (ICIER)
- 35.2.9 I2C-bus Status Register 1 (ICSR1)
- 35.2.10 I2C-bus Status Register 2 (ICSR2)
- 35.2.11 Slave Address Register Ly (SARLy) (y = 0 to 2)
- 35.2.12 Slave Address Register Uy (SARUy) (y = 0 to 2)
- 35.2.13 I2C-bus Bit Rate Low-Level Register (ICBRL)
- 35.2.14 I2C-bus Bit Rate High-Level Register (ICBRH)
- 35.2.15 I2C-bus Transmit Data Register (ICDRT)
- 35.2.16 I2C-bus Receive Data Register (ICDRR)
- 35.2.17 I2C-bus Shift Register (ICDRS)
- 35.3 Operation
- 35.4 SCL Synchronization Circuit
- 35.5 SDA Output Delay Function
- 35.6 Digital Noise Filters
- 35.7 Address Match Detection
- 35.8 Automatic Low-Hold Function for SCL
- 35.9 Arbitration-Lost Detection Functions
- 35.10 Start Condition/Restart Condition/Stop Condition Generating Function
- 35.11 Bus Hanging
- 35.12 SMBus Operation
- 35.13 Interrupt Sources
- 35.14 Initialization of Registers and Functions When a Reset is Applied or a Condition is Detected
- 35.15 Event Link Function (Output)
- 35.16 Usage Notes
- 36. CAN Module (RSCAN)
R01UH0823EJ0110 Rev.1.10 Page 1061 of 1852
Nov 30, 2020
RX23W Group 33. Serial Communications Interface (SCIg, SCIh)
33.6.5 SCI Initialization (Smart Card Interface Mode)
Initialize the SCI following the example of flowchart shown in Figure 33.38.
Initialize the SCR and SSR registers before switching from transmit mode to receive mode and vice versa. When not
changing the bit rate, it is not necessary to set the CKE[1:0] bits to 00b. Even if the RE bit is set to 0, the RDR register is
not initialized.
To change receive mode to transmit mode, first check that reception has completed, and then execute steps [1] and [3] in
Figure 33.38. Set TE = 1 and RE = 0 at step [11]. Reception completion can be verified by reading the RXI request,
SSR.ORER, or SSR.PER flag.
To change transmit mode to receive mode, first check that transmission has completed, and then execute steps [1] and [3]
in
Figure 33.38. Set TE = 0 and RE = 1 at step [11]. Transmission completion can be verified by reading the SSR.TEND
flag.
Figure 33.38 Example of SCI Initialization Flowchart (Smart Card Interface Mode)
Start
Set the SCR register to 00h
Set the SIMR1.IICM bit to 0, and
set the SCMR.SMIF bit to 1
Set the SSR.ORER, ERS, and PER flags
to 0
Set the SPMR register to 00h
Set the SMR.GM, BLK, PM, BCP[1:0], and
CKS[1:0] bits, and set the SMR.PE bit to 1
Set the SCMR.BCP2, SDIR, and SINV bits
Set the SEMR register to 00h
Set the BRR register
Set the pin functions
(set the MPC and I/O port)
Set the SCR.CKE[1:0] bits
Set the SCR.TE, RE, TIE, and RIE bits
End
[ 1 ]
[ 2 ]
[ 3 ]
[ 4 ]
[ 5 ]
[ 6 ]
[ 7 ]
[ 8 ]
[ 9 ]
[ 10 ]
[ 11 ]
[ 1 ] Set the SCR register to 00h to stop transmission and reception.
[ 2 ] Set the SIMR1.IICM bit to 0 and the SCMR.SMIF bit to 1 for
setting the SCI to smart card interface mode.
[ 3 ] Clear the SSR.ORER, ERS, and PER flags.
After reading the SSR register, write C0h in the register.
[ 4 ] Set the SPMR register to 00h.
[ 5 ] Set the operating mode and transmission and reception format in
the SMR register.
[ 6 ] Set the transmission and reception format in the SCMR register.
Do not change the SMIF bit.
[ 7 ] Set the SEMR.BRME and RXDESEL bits 0. Set the other bits in
the SEMR register to 0.
[ 8 ] Set the value corresponding to the bit rate in the BRR register.
[ 9 ] Set the PxyPFS and PMR registers so that the necessary pin
functions among the TXDn, RXDn, and SCKn pins can be
enabled.
The TXDn, RXDn, and SCKn pins become high-impedance.
[ 10 ] Set the SCR.CKE[1:0] bits.
When the CKE[0] bit is set to 1, the clock is output from the SCKn
pin.
[ 11 ] Set either the SCR.TE or RE bit to 1.
Do not set both the TE and RE bits to 1 except for self-diagnosis.
At this time, also set the TIE and RIE bits if necessary.