Datasheet

Section 5 Interrupt Controller
Rev. 3.00 Mar 17, 2006 page 92 of 926
REJ09B0283-0300
Bit Bit Name Initial Value R/W Description
5 IRQ5E 0 R/W IRQ5 Enable
The IRQ5 interrupt request is enabled when this
bit is 1.
4 IRQ4E 0 R/W IRQ4 Enable
The IRQ4 interrupt request is enabled when this
bit is 1.
3 IRQ3E 0 R/W IRQ3 Enable
The IRQ3 interrupt request is enabled when this
bit is 1.
2 IRQ2E 0 R/W IRQ2 Enable
The IRQ2 interrupt request is enabled when this
bit is 1.
1 IRQ1E 0 R/W IRQ1 Enable
The IRQ1 interrupt request is enabled when this
bit is 1.
0 IRQ0E 0 R/W IRQ0 Enable
The IRQ0 interrupt request is enabled when this
bit is 1.
5.3.4 IRQ Sense Control Registers H and L (ISCRH, ISCRL)
ISCR select the source that generates an interrupt request at pins IRQ15 to IRQ0.
• ISCRH
Bit Bit Name Initial Value R/W Description
15
14
IRQ15SCB
IRQ15SCA
0
0
R/W
R/W
IRQ15 Sense Control B
IRQ15 Sense Control A
00: Interrupt request generated at IRQ15 input
low level
01: Interrupt request generated at falling edge
of IRQ15 input
10: Interrupt request generated at rising edge of
IRQ15 input
11: Interrupt request generated at both falling
and rising edges of IRQ15 input