Datasheet

Section 7 I/O Ports
Rev. 2.00 Sep. 28, 2009 Page 169 of 994
REJ09B0452-0200
7.2.11 Port B
(1) PB7/RTS/FSISS
The pin function is switched as shown below according to the combination of the SCIFE bit in
HICR5 of LPC, the FSIE bit in FSICR1 of FSI and the PB7DDR bit.
Setting
FSI SCIF I/O Port
Module
Name
Pin Function
FSISS_OE RTS_OE PB7DDR
FSI FSISS output 1 ⎯ ⎯
SCIF RTS output 0 1 ⎯
I/O port PB7 output 0 0 1
PB7 input
(initial setting)
0 0 0
(2) PB6/CTS/FSICK
The pin function is switched as shown below according to the FSIE bit in FSICR1 of FSI and the
PB6DDR bit.
Setting
FSI I/O Port
Module
Name
Pin Function
FSICK_OE PB6DDR
FSI FSICK output 1 ⎯
I/O port PB6 output 0 1
PB6 input
(initial setting)
0 0