Datasheet

Section 7 I/O Ports
Rev. 2.00 Sep. 28, 2009 Page 170 of 994
REJ09B0452-0200
(3) PB5/DTR/FSIDI
The pin function is switched as shown below according to the combination of the SCIFE bit in
HICR5 of LPC, the FSIE bit in FSICR1of FSI and the PB5DDR bit.
Setting
FSI SCIF I/O Port
Module
Name
Pin Function
FSIDI DTR_OE PB5DDR
FSI FSIDI input 1 ⎯ ⎯
SCIF DTR output 0 1 ⎯
I/O port PB5 output 0 0 1
PB5 input
(initial setting)
0 0 0
(4) PB4/DSR/FSIDO
The pin function is switched as shown below according to the state of the FSIE bit in FSICR1 of
FSI and the PB4DDR bit.
Setting
FSI I/O Port
Module
Name
Pin Function FSIDO_OE PB4DDR
FSI FSIDO output 1 ⎯
I/O port PB4 output 0 1
PB4 input
(initial setting)
0 0