Datasheet

Section 10 16-Bit Timer Pulse Unit (TPU)

Rev. 2.00 Sep. 28, 2009 Page 288 of 994

REJ09B0452-0200

10.6 Interrupts

10.6.1 Interrupt Source and Priority

There are three kinds of TPU interrupt source: TGR input capture/compare match, TCNT

overflow, and TCNT underflow. Each interrupt source has its own status flag and enable/disabled

bit, allowing generation of interrupt request signals to be enabled or disabled individually. When

an interrupt request is generated, the corresponding status flag in TSR is set to 1. If the

corresponding enable/disable bit in TIER is set to 1 at this time, an interrupt is requested. The

interrupt request is cleared by clearing the status flag to 0. Relative channel priorities can be

changed by the interrupt controller, but the priority order within a channel is fixed. For details, see

section 5, Interrupt Controller. Table 10.25 lists the TPU interrupt sources.

Table 10.25 TPU Interrupts

Channel Name Interrupt Source Interrupt Flag Priority*

TGI0A TGRA_0 input capture/compare match TGFA High

TGI0B TGRB_0 input capture/compare match TGFB

TGI0C TGRC_0 input capture/compare match TGFC

TGI0D TGRD_0 input capture/compare match TGFD

TCI0V TCNT_0 overflow TCFV

TGI1A TGRA_1 input capture/compare match TGFA

TGI1B TGRB_1 input capture/compare match TGFB

TCI1V TCNT_1 overflow TCFV

TCI1U TCNT_1 underflow TCFU

TGI2A TGRA_2 input capture/compare match TGFA

TGI2B TGRB_2 input capture/compare match TGFB

TCI2V TCNT_2 overflow TCFV

TCI2U TCNT_2 underflow TCFU Low

Note: * This table shows the initial state immediately after a reset. The relative channel

priorities

can be changed by the interrupt controller.