Datasheet

Section 16 CIR Interface
Rev. 2.00 Sep. 28, 2009 Page 473 of 994
REJ09B0452-0200
Bit Bit Name
Initial
Value
R/W Description
3 REPRCVE 0 R/W Receive Enable after Repeat Detection
Enables/disables the CIR reception after a repeat
detection.
0: The CIR reception is disabled by a repeat
detection.
1: The CIR reception is enabled by a repeat detection
2 ⎯ 0 R/W Reserved
The initial value should not be changed.
1
0
CLK1
CLK0
0
0
R/W
R/W
Reference Clock
00: Internal clock φ
01: Internal clock φ/2
10: Internal clock φ/4
11: subclock φsub
16.3.2 Receive Control Register 2 (CCR2)
CCR2 consists of the bits that select the CIR communication format.
Bit Bit Name
Initial
Value
R/W Description
7
6
TFM1
TFM0
0
0
R/W
R/W
Reception Signal Format Select
00: NEC format (4 bytes are used)
(Address, address, command, and command are
stored in CIRRDR.)
01: NEC format (2 bytes are used)
(Address and command are stored in CIRRDR.)
10: Setting prohibited
11: Setting prohibited
5 to 0 ⎯ All 0 R/W Reserved
The initial value should not be changed.