Datasheet

Section 18 I
2
C Bus Interface (IIC)
Rev. 2.00 Sep. 28, 2009 Page 548 of 994
REJ09B0452-0200
When, with the I
2
C bus format selected, IRIC is set to 1 and an interrupt is generated, other flags
must be checked in order to identify the source that set IRIC to 1. Although each source has a
corresponding flag, caution is needed at the end of a transfer.
When the ICDRE or ICDRF flag is set, the IRTR flag may or may not be set. The IRTR flag is not
set at the end of a data transfer up to detection of a retransmission start condition or stop condition
after a slave address (SVA) or general call address match in I
2
C bus format slave mode.
Tables 18.5 and 18.6 show the relationship between the flags and the transfer states.
Table 18.5 Flags and Transfer States (Master Mode)
MST TRS BBSY ESTP STOP IRTR AASX AL AAS ADZ ACKB ICDRF ICDRE State
1 1 0 0 0 0 0↓ 0 0↓ 0↓ 0 — 0 Idle state (flag clearing
required)
1 1 1↑ 0 0 1↑ 0 0 0 0 0 — 1↑ Start condition detected
1 — 1 0 0 — 0 0 0 0 — — — Wait state
1 1 1 0 0 — 0 0 0 0 1↑ — — Transmission end
(ACKE=1 and ACKB=1)
1 1 1 0 0 1↑ 0 0 0 0 0 — 1↑ Transmission end with
ICDRE=0
1 1 1 0 0 — 0 0 0 0 0 — 0↓ ICDR write with the
above state
1 1 1 0 0 — 0 0 0 0 0 — 1 Transmission end with
ICDRE=1
1 1 1 0 0 — 0 0 0 0 0 — 0↓ ICDR write with the
above state or after start
condition detected
1 1 1 0 0 1↑ 0 0 0 0 0 — 1↑ Automatic data transfer
from ICDRT to ICDRS
with the above state
1 0 1 0 0 1↑ 0 0 0 0 — 1↑ — Reception end with
ICDRF=0
1 0 1 0 0 — 0 0 0 0 — 0↓ — ICDR read with the
above state
1 0 1 0 0 — 0 0 0 0 — 1 — Reception end with
ICDRF=1
1 0 1 0 0 — 0 0 0 0 — 0↓ — ICDR read with the
above state
1 0 1 0 0 1↑ 0 0 0 0 — 1↑ — Automatic data transfer
from ICDRS to ICDRR
with the above state