Datasheet

Section 18 I
2
C Bus Interface (IIC)
Rev. 2.00 Sep. 28, 2009 Page 560 of 994
REJ09B0452-0200
18.4 Operation
The I
2
C bus interface has an I
2
C bus format and a serial format.
18.4.1 I
2
C Bus Data Format
The I
2
C bus format is an addressing format with an acknowledge bit. This is shown in figure 18.3.
The first frame following a start condition always consists of 9 bits.
The serial format is a non-addressing format with no acknowledge bit. This is shown in figure
18.4.
Figure 18.5 shows the I
2
C bus timing.
The symbols used in figures 18.3 to 18.5 are explained in table 18.7.
SASLA
7n
R/W DATA A
1
1m
111
A/A
1
P
1
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m = from 1)
S SLA
7n1 7
R/W A DATA
11
1m1
1
A/A
1
S
1
SLA R/W
1
1m2
A
1
DATA
n2
A/A
1
P
1
(a) FS = 0 or FSX = 0
(b) Start condition retransmission FS = 0 or FSX = 0
Upper row: Transfer bit count (n1, n2 = 1 to 8)
Lower row: Transfer frame count (m1, m2 = from 1)
Figure 18.3 I
2
C Bus Data Format (I
2
C Bus Format)
S DATA
8n
DATA
1
1m
P
1
FS=1 and FSX=1
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m = from 1)
Figure 18.4 I
2
C Bus Data Format (Serial Format)