Datasheet

Section 21 FSI Interface
Rev. 2.00 Sep. 28, 2009 Page 686 of 994
REJ09B0452-0200
21.3.1 FSI Control Register 1 (FSICR1)
The FSICR1 control bits are classified into three functionalities: resetting the FSI internal signals,
enabling/disabling FSI functions, and selecting FSI functions.
R/W
Bit Bit Name
Initial
Value EC Host Description
7 SRES 0 R/W ⎯ Software Reset
Controls initialization of the FSI internal sequencer.
0: Normal state
1: Clears the internal sequencer.
Writing 1 to this bit generates a clear signal for the
sequencer in the corresponding module, resulting in
the initialization of the FSI's internal state.
6 FSIE 0 R/W ⎯ FSI Enable
0: Disables FSI operation.
1: Enables FSI operation.
The following shows the initial state of the FSI pins
when FSIE is set to 1:
FSISS: Outputs high level.
FSICK: Outputs high level or low level depending on
DPHS and CPOS.
FSIDO: Outputs high level.
FSIDI: Inputs data.
5 FRDE 0 R/W ⎯ Fast-Read Enable
0: The FSI is in normal read operation mode.
1: The FSI is in fast-read operation mode.
4 AAIE 0 R/W ⎯ AAI (Auto Address Increment) Program Enable
0: The FSI performs byte-program operation.
1: The FSI performs AAI program operation.