Datasheet

Section 21 FSI Interface
Rev. 2.00 Sep. 28, 2009 Page 701 of 994
REJ09B0452-0200
• FSIARL
R/W
Bit Bit Name
Initial
Value EC Host Description
7 to 0 bit 7 to bit 0 All 0 R ⎯ These bits store bits [7:0] of the SPI flash memory
address.
21.3.19 FSI Write Data Registers HH, HL, LH, and LL (FSIWDRHH, FSIWDRHL,
FSIWDRLH, and FSIWDRLL)
FSIWDR stores data to be written to the SPI flash memory. If the host address matches FSIHBAR
during LPC/FW memory write cycle, the FSIWDR value will be updated. FSIHBAR value is not
updated by command access.
• FSIWDRHH
R/W
Bit Bit Name
Initial
Value EC Host Description
7 to 0 bit 31 to
bit 24
All 0 R ⎯ These bits store bits [31:24] of the SPI flash memory
write data
• FSIWDRHL
R/W
Bit Bit Name
Initial
Value
EC Host Description
7 to 0 bit 23 to
bit 16
All 0 R ⎯ These bits store bits [23:16] of the SPI flash memory
write data.